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Low EMI SMPS - How to design to pass FCC
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depot:
I have a set of projects focused around battery powered applications, so buck-boost or SEPIC topology I think. Output voltage is the standard 3.3v for processors, also an LTE chip, maybe a few amps burst peak output current but average much less. The batteries might be lithium primary cells, 3 alkaline, lithium rechargeable, all that annoying range that could be above or below 3.3v. So far it looks really cool, but bringing things together can go haywire.

There are all kinds of white paper on this kind of design. I don't see as many "maker" level tutorials, but videos are there. I'm trying to eat it up.

I really like this "silent switcher" technology, but it's only for buck topology. https://www.analog.com/en/products/landing-pages/001/silent-switcher.html

Otherwise I see that slew rate could be important. Picking a lower frequency sounds helpful. Silent switcher has a paper about making another "hot current loop" of opposite polarity to cancel out the first one in far-field. It also sounds like some of the new technology works against my by sacrificing EMI for high efficiency, small size, and lower cost. Everyone here says low noise is the most important, design it in from the start. Other engineers have a lot of trouble with it, sounds like.

Does anyone just slap on a metal shield? I hear that also doesn't tend to work.

So share some tips with a greenhorn please! Or your own horror stories if you like.
T3sl4co1l:
So, common ground, just a converter, not an isolator?

The big problems happen when voltage is generated between cables, which act as antenna elements.  That is, common mode noise.

On a common ground (say a three terminal converter, Vin, GND, Vout), common mode is limited by how well filtered Vin and Vout are with respect to GND, and by what ground loop voltage appears between the two GNDs if applicable.

Ideally you arrange the connections so they are on one side, in a row, Vin, GND, Vout, so the loop between the two grounds has zero length.  A pointlike connection.  There can't be any voltage drop between grounds, and you're safe, limited only by the filters.

Even easier if you don't have wires at all.  The worst you can do is have a voltage drop across the device itself, say from the battery end to the radio module end, or, however it's laid out.  You can still have EMC problems, but they will be limited to high frequencies, and you may not need to address grounding or snubbing but just put in some ferrite beads (mind, the amount of stuff that might need to be ferrite-beaded in such a situation might be much worse than fixing it properly ;D ).

Switching frequency doesn't matter much; higher frequency is generally desirable, for miniaturization.  Just shop for regulators or controllers in the V,I range you need.

Tim
MagicSmoker:

--- Quote from: depot on December 07, 2019, 05:26:17 am ---Output voltage is the standard 3.3v for processors, also an LTE chip...
--- End quote ---

What do you need low noise for, then? Or do you simply mean, "low enough noise to pass FCC?" The former would apply if you have some sensitive analog circuits and/or an ADC running at 16b or greater precision; the latter generally always applies.

Most batteries dislike pulsating current loads so converter topologies with relatively smooth input current are preferred, such as the boost-derived converters like the boost, Cuk (aka boost-buck) and SEPIC. Loads that are sensitive to noise will do better with converters that have relatively smooth output current, like the buck-derived types such as the buck, Zeta, forward, bridge, push-pull, etc.

Note that the buck-boost - aka, non-isolated flyback - has both pulsating input and output currents so nobody is happy, and it inverts polarity to boot. That said, the SEPIC converter is the most difficult topology to stabilize (4th order + a right half plane zero), often requiring lowering the loop bandwidth down below 1/500th of the switching frequency. This might not be a good choice for your application with its wild load swings unless you can afford to throw lots of output capacitance into the mix.

An alternate to the SEPIC is the Zeta converter (basically the buck-derived version of the boost-derived SEPIC), which is still 4th order but doesn't have the RHPZ. The switch requires high-side drive, however, which does somewhat limit your choice of controller ICs to those that have a charge-pump (aka - bootstrap) driver (or you need to use an external driver IC). A really good comparison of the SEPIC and Zeta is on Linear Technology's Analog Devices' website: https://www.analog.com/en/technical-articles/the-low-output-voltage-ripple-zeta-dc-dc-converter-topology.html

I've used the SEPIC to supply 24V at up to 3A over a 2:1 input voltage range and while it did get the job done, it required about 4x the output capacitance to make up for its very poor transient response (aka - low loop bandwidth). Fortunately, the client decided after evaluating the prototype product this converter was used in that they didn't need such a wide input voltage range and I simply ripped it out entirely; I never did trust the thing to not break out into a destructive oscillation at some combination of line and load.

T3sl4co1l:

--- Quote from: MagicSmoker on December 07, 2019, 12:21:10 pm ---That said, the SEPIC converter is the most difficult topology to stabilize (4th order + a right half plane zero), often requiring lowering the loop bandwidth down below 1/500th of the switching frequency.

--- End quote ---

Who the hell uses voltage mode control in this day and age?

FYI, the coupling capacitor doesn't affect switching or loop response, as long as it's dimensioned appropriately, and well damped if possible.

Tim
MagicSmoker:

--- Quote from: T3sl4co1l on December 07, 2019, 06:56:28 pm ---
--- Quote from: MagicSmoker on December 07, 2019, 12:21:10 pm ---That said, the SEPIC converter is the most difficult topology to stabilize (4th order + a right half plane zero), often requiring lowering the loop bandwidth down below 1/500th of the switching frequency.

--- End quote ---

Who the hell uses voltage mode control in this day and age?
--- End quote ---

Ahem... I didn't assume a control scheme. I also didn't mention the complications/benefits of (usually loosely) coupling the two inductors. In fact, I didn't mention a lot of things in a jaunty little forum post...  :P

That said, CMC might only reliably eliminate one inductor from the transfer function (theoretically you can take both out at the same time, but this is a case where theory and practice don't align too well).


--- Quote from: T3sl4co1l on December 07, 2019, 06:56:28 pm ---FYI, the coupling capacitor doesn't affect switching or loop response, as long as it's dimensioned appropriately, and well damped if possible.

--- End quote ---

I always dread disagreeing with you on anything, but in my (limited, but at least non-zero) experience with the SEPIC it is quite difficult to avoid LC resonances between Cc and the two inductors, even more difficult if the inductors are coupled (hence the usual advice to loosely couple them - ie, have a lot of leakage), and damping requires Cc either have more ESR than is favorable for efficiency (ie - series damping) or a rather sizeable DC blocking capacitor for a shunt damping resistor (>4x Cc, to as much as 10x Cc).

There's good reasons why the Cuk, SEPIC, and Zeta converters are rarely used in commercial products (though arguably a good chunk is due to general unfamiliarity).

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