The power supply section is a possible source of variable heat and should thus be more separated, possibly even using THT power transistors.
I don't think one really needs the trimmer for the output balance - just 2 good resistors should be good enough.
I would more think about a trimmer or optional parallel resistors to adjust the temperature drift, possibly even with the option to go close to zero. There are a few point where one could do a TC adjustment, e.g. via the exact JFET current. It may need coarse adjustment at the current source for the amplifier: the current source currently has quite a bit of negative TC, so the current going down with temperature. It may take a diode (or even 2) in series to R22/24/26/28 to compensate.
It is also odd to have kind of parallel current source and separate cascode transistors and still directly couple them. With more like 3 or 4 more separate current paths one could get better current sharing and better see errors (e.g. no well matched transistors). So each of the cascodes (Q5,Q10,Q15) could get it's own current source. They would be combined though 3 extra resistor (e.g. 100 Ohms range) before R35.
There is no series element for protection at the input. Connecting to a DC source give quite some current spike, that might damage the protection and possible the DUT. This is kind of a tricky topic, as the protection can introduce noise. So the common way is to have a series resistor that can be bridged with a switch. After the DUT is connected.
I made an op-amp version with ADA4898 roughly based on the 'lono'
The clamp isn't symmetrical about ground because the JFET gate potential sits at a few hundred mV negative and needs headroom for the possibility of lower transconductance JFETs or running a lower Id.
The diode of that pair with both A and K tied to ground simply isn't used.
When you first apply power don't be alarmed that the output is railed out and that the lower two LEDs aren't initially glowing. That's normal because the JFETs are saturated and grounding the emitters of the cascodes until the servo loop has stabilized the quiescent DC operating point. It takes 30 or 40 or 60 seconds or so. Sorry I don't have a BOM. Don't go changing any resistive dividers or time constants anywhere.
The board layout looks like it has a few points that are not ideal: the input JFETs are quite a bit spread out and relatively close to the power transistors from the power supply section. The power supply section is a possible source of variable heat and should thus be more separated, possibly even using THT power transistors.
The board looks like there is a ground plane - for good precision one should have a defined ground path for the signal. So R42 should be closely linked to ground of the input terminal. With only 1 Ohms trace resistance can also become an issue.
I don't see the input capacitor C1 - ideally this should be a low loss type like PP. NP0 caps are not yet that practical at 1 µF. So even if most of the board is SMD, I would consider space for a relatively bulk PP film type.
There is no series element for protection at the input. Connecting to a DC source give quite some current spike, that might damage the protection and possible the DUT. This is kind of a tricky topic, as the protection can introduce noise. So the common way is to have a series resistor that can be bridged with a switch. After the DUT is connected.
The clamp isn't symmetrical about ground because the JFET gate potential sits at a few hundred mV negative and needs headroom for the possibility of lower transconductance JFETs or running a lower Id.
The diode of that pair with both A and K tied to ground simply isn't used.
Ah ha, I thought there must have been a reason for it but I couldn't think of why, makes sense now. I learned a new thing today.When you first apply power don't be alarmed that the output is railed out and that the lower two LEDs aren't initially glowing. That's normal because the JFETs are saturated and grounding the emitters of the cascodes until the servo loop has stabilized the quiescent DC operating point. It takes 30 or 40 or 60 seconds or so. Sorry I don't have a BOM. Don't go changing any resistive dividers or time constants anywhere.
I figured it all out from the schematics. I'm using all 1% 1206 50ppm resistors and haven't changed any values.
I did put the capacitors you mounted point-to-point on the input, output and power jacks, directly on the PCB right next to the PCB mounted jacks I used.
Can you list what values you used, just so I can be in the ballpark?
The board layout looks like it has a few points that are not ideal: the input JFETs are quite a bit spread out and relatively close to the power transistors from the power supply section. The power supply section is a possible source of variable heat and should thus be more separated, possibly even using THT power transistors.
The board looks like there is a ground plane - for good precision one should have a defined ground path for the signal. So R42 should be closely linked to ground of the input terminal. With only 1 Ohms trace resistance can also become an issue.
I don't see the input capacitor C1 - ideally this should be a low loss type like PP. NP0 caps are not yet that practical at 1 µF. So even if most of the board is SMD, I would consider space for a relatively bulk PP film type.
I'll take a look at those points and make some adjustments to the layout. I can probably scrunch up the fets etc a bit that will give me space to move them further from the power supply. Maybe I could break the ground plane between the fets and power supply too, to provide a bit of a barrier to heat conduction as well?
I wonder if a copper heat spreader on top of the fets to help equalise heat between them would make any difference?
As for C1 (and C9), I used an SMD film capacitor, a Wima SMD-PET, 1uF 63 VDC/40 VAC part, but I might bump C1 up to a 250 VDC/160 VAC part to be on the safe side.
The datasheet for this part is linked here, let me know if you think this part is no good.
https://www.wima.de/wp-content/uploads/media/e_WIMA_SMD_PET.pdf
There is no series element for protection at the input. Connecting to a DC source give quite some current spike, that might damage the protection and possible the DUT. This is kind of a tricky topic, as the protection can introduce noise. So the common way is to have a series resistor that can be bridged with a switch. After the DUT is connected.
Would a couple of ohms do it? I won't be testing anything over 100V, my highest voltage PSU that I want to test output ripple on kicks out about 65V maximum.
BTW, this kind of amplifier is a massive overkill for measuring the output ripple of any typical lab power supply.
What is the intended application for this circuit?
I don't think one would need a 4 layer board. Some vias to connect / patch the ground plane should be enough. One may a reduce the fragmentation if needed.
The expected effect of a MKS type or similar capacitor is that after a larger voltage jump, one would see some low DC / very low frequency drift over quite some time of maybe 1-10 minutes - more than the normal RC time constant. This may be acceptable, as warm up would take longer anyway. Fast moving a probe around can be tricky anyway due to the large capacitance.
For the PPS capacitor the loss factor looks good. However I remember somewhat conflicting results on DA in PPS. DA is not is not fully characterized by a single number, but is also frequency dependent. AFAIK PPS is good at some frequencies and not so good at others.
In theory also some NP0 caps can have very low loss. However I don't know the large ones and 1 µF would need something like 10 x 100 nF in parallel. Also not all NP0 are equal.
It could still be worth to have the option to use PPS if MKS is giving to much DA effect after a jump.
It really depends on the usage, but other similar amplifiers often include some series resistor at the input to limit the current when charging the capacitor. So something like 5 K in parallel with a switch to turn of the extra protection. A 1 µF capacitor could be too much for some circuits to measure (the typical LTZ1000 reference circuit would no like connecting this amplifier).
Thanks. OK, it's getting on to 1am here, but who needs sleep when it's holidays. Attached is the revised schematic and I am almost done modifying the PCB layout.