Author Topic: Low noise Piezo stack driver amplifier design  (Read 8994 times)

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Offline dzsekiTopic starter

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Low noise Piezo stack driver amplifier design
« on: August 19, 2021, 10:05:46 pm »
I'm in a need of a "low noise" amplifier that can drive piezo stacks (for precise motion control purposes).
- The piezo stack itself can operate between -10 to 120V, so the amplifier can almost be unipolar. As known piezo stacks acts very much like capacitors, such piezo may have capacitance of several uFs.
- Low noise: the amplifier should have S/N ratio to faithfully serve 20-22 bit DACs.
- Low speed: bandwidth DC to 3kHz.
- Low gain: 5-10 times amplification


Initially I was immersed by the "low noise" requirement of this project and found the following:
a.) Use a single amplifier that have inherently low noise.
b.) Whatever amplifier I have, I can lower the noise by adding more amplifiers parallel. With 2 amplifiers the theoretical yield would be +3dB in S/N, with 4 amplifiers +6dB.  What I think is that this should work also when amplifiers are bridged, ie. two amplifiers working to a floating load in anti phase would yield +3dB, when two pair paralleled amplifiers are bridged would yield +6dB.
c.) Since the bandwidth is not very high and the output is already a capacitor I can add an R-C filter (where R is small and C is in the order of the load) to the output, to filter out noise further.

My source signal is differential to start with, so having a bridged, floating output is not a hassle at all.
There are several high voltage opamps but they are either specialty items and hard to come by or expensive (or both).

I am toying with the idea of building the amplifier around the OPA445 opamp. The specs for this IC is not outstanding by any means, but fair, but the maximal power supply is 90V which is just too small.
But having two of these amplifiers driving in bridge mode would be enough, eg. the positive side driver IC would run from +70V and -15V supply, the negative driver would run from +15V and -70V supply, so the total output voltage could swing between ca. -25V to 135V .

Even though the bandwidth is fairly low at 3kHz, but driving 10uF would still be tough for these opamps (from dissipation point of view), so I would add a simple "two transistor current booster stage" to the output.

I have ran noise simulations and even a single opamp and current booster would reach S/N >150dB (which is more than 24bit resolution), at full drive voltage!

Can it be this simple or am I missing something?

PS.: I have been playing in simulations with low noise low voltage opamps with bootstrapped (tracking) supply as well, but the difference in the results were negligible compared to the effort for the bootstrapping circuit.
« Last Edit: August 19, 2021, 10:10:12 pm by dzseki »
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Offline Marco

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Re: Low noise Piezo stack driver amplifier design
« Reply #1 on: August 19, 2021, 11:18:57 pm »
With that many bits, I'd worry more about offset drift than noise. Presumably you want repeatability?
 

Offline mawyatt

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Re: Low noise Piezo stack driver amplifier design
« Reply #2 on: August 20, 2021, 12:18:41 am »
Here's something that might be of some help regarding Piezo Drivers and Controllers. This was a project we did some time ago to help with positioning in the nanometer regions.

https://www.photomacrography.net/forum/viewtopic.php?f=25&t=40510

Lately we've been developing a 128 independent channel AWG with effective 15 bit resolution capable of driving +-90V. The design is based around the TI OPA462 Op-Amp as the driver amp. We've done a lot of evaluation and selected the OPA462 over other candidate amps. The "Over Current-Voltage-Die Temperature" are nice features. This Op-Amp might be worth investigating.

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Offline T3sl4co1l

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Re: Low noise Piezo stack driver amplifier design
« Reply #3 on: August 20, 2021, 04:38:41 am »
With that many bits, I'd worry more about offset drift than noise. Presumably you want repeatability?

In other words, 1/f noise -- easily solved using a chopper/autozero amp, which are available these days in quite a bit more bandwidth (~3MHz) than needed here, so it should be a fine choice.

With an op-amp closing the loop, the buffer can be really anything.  A discrete amplifier with level shift and current boost, would do a fine job.  Not that a whole lot of current will be needed at 3kHz.

A very important question: do you know if the transducer is subject to mechanical hysteresis?  If so, you may need a similarly precise position sensor, and a servo loop.  Or active cancellation (e.g. when performing a move, overshoot a preprogrammed amount, optionally wiggling somewhat, to settle to the correct position).  Backlash algorithms are commonly applied in CNC, probably easy to look up examples.

Also, does its capacitance vary with applied voltage (over the given control range), or say with applied force?  This can make compensation challenging; a possible consequence being, the loop bandwidth has to be turned down to the worst-case condition, slowing settling time.

Note that loop gain determines settling time: the higher the loop and transducer bandwidths are, the faster settling can be, to within some margin of error.  And the error is dependent on the loop gain, at the frequency equivalent to that time.  (Loop gain is generally decreasing with rising frequency, i.e. the error amp looks like an integrator.)  I'm guessing it needs to be quite stable (within say >20 bits after X time?) so this can suggest a more challenging control scheme if faster settling is required.

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Offline dzsekiTopic starter

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Re: Low noise Piezo stack driver amplifier design
« Reply #4 on: August 20, 2021, 04:53:37 am »
With that many bits, I'd worry more about offset drift than noise. Presumably you want repeatability?

Well, the piezos tend to drift anyway, so I am not sure about the drift. I have also considered OP177 and LT2057HV (chopper stabilized), the former would only work with bootstrapping, the later maybe would be good enough alone with limited output.
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Offline Marco

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Re: Low noise Piezo stack driver amplifier design
« Reply #5 on: August 20, 2021, 02:22:32 pm »
You don't need to bootstrap, bootstrapping is used so the opamp can function as the central push-pull driver for a class AB output stage. That's done for speed reasons.

This is slow as hell, so you can just drive a class A stage to provide voltage amplification, which drives a class AB ouput buffer and then closing the loop back to the opamp with a divider. Hell,  you might not even need the AB.

PS. oops, with a couple uF you're driving multiple amps at 3khz and 120v, so you do want the AB stage.
« Last Edit: August 20, 2021, 02:30:10 pm by Marco »
 

Offline dzsekiTopic starter

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Re: Low noise Piezo stack driver amplifier design
« Reply #6 on: August 20, 2021, 03:39:01 pm »
Sorry my terminology might be inaccurate, by bootstrapping I mean the circuit below, which enables opamps to operate highert supply rails than on their own.
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Offline Conrad Hoffman

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Re: Low noise Piezo stack driver amplifier design
« Reply #7 on: August 20, 2021, 04:29:37 pm »
Z is about 5.3 ohms at 3 kHz, so current is fairly high. Even "hard" PZTs suffer from drift and hysteresis so any talk of 20 or even 16 bits seems optimistic. The multilayer devices implied by 10 uF have losses and will change temperature, adding to the uncertainty. Decades ago I worked for Burleigh Instruments, making interferometers and such. We never had much trouble building quiet amplifiers using garden variety op-amps plus discrete output stages, but we were always plagued by 60 Hz getting into the circuits. Pay attention to your power supply layout! FWIW, the Apex amps are very good. We used those to drive the scanners in AFMs. Alas, all that stuff predates the lower voltage higher capacitance multi-layer devices.
« Last Edit: August 21, 2021, 04:33:13 pm by Conrad Hoffman »
 

Offline mawyatt

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Re: Low noise Piezo stack driver amplifier design
« Reply #8 on: August 20, 2021, 05:30:24 pm »
We reviewed and tested the APEX PA441 and PA443 for our latest project. These were very good, but in the end selected the OPA462 for many reasons, things like availability, footprint (we are using 128!!), and the mentioned Over-level features. Our needs were not for high current, but if higher current is required, then just include a class A/B driver inside the loop.

In the link provided earlier, the piezo elements we used were from Physik Instrumente, and were high capacitive (recall 5~10uF). These were embedded in a solid stainless steel block that utilized noiseless flexures for bearings and position feedback from a pair of precision strain gauge bridges. As you can view on the thread the highly simplified closed loop transfer function was quite involved.

Here's another link from PM, that's shows a PI OEM P603K Driver/Amp with a custom interface for operation from a Raspberry Pi.

https://www.photomacrography.net/forum/viewtopic.php?f=25&t=40682&hilit=Physik

BTW, measuring tens of nanometer levels is not trivial and we utilized a very unique method to do such.

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Offline mawyatt

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Re: Low noise Piezo stack driver amplifier design
« Reply #9 on: August 20, 2021, 05:43:58 pm »
Decades ago I worked for Burleigh Instruments, making interferometers and such.

Sounds like interesting work with interferometers :-+

Back in 1980~84 we worked on the XM21 Remote Sensing Chemical Agent detector. This instrument was based upon a precision Laser Controlled small (handheld) closed loop moving mirror Michelson Interferometer sensing 8-12 microns with a Cryo-Cooled (77K) Mercury-Cadium-Telluride detector. The technique employed was called Remote Sensing Spectral Radiometry, and utilized the atmospheric background minute temperature gradients to create a S-B Blackbody "signature" of the atmosphere which reveled the various aerosol chemicals remotely. From this warfare chemical agents and concentrations could be extracted.

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Offline David Hess

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Re: Low noise Piezo stack driver amplifier design
« Reply #10 on: August 21, 2021, 12:53:44 am »
Someone should check my math but 3 kHz, 130 volts peak-to-peak, and 10 microfarads requires a current of 12 amps.  Is that what you had in mind?

12 amps with +/-60 volt supplies is well into 100+ watt power amplifier territory.

I have ran noise simulations and even a single opamp and current booster would reach S/N >150dB (which is more than 24bit resolution), at full drive voltage!

It may not matter in your application but distortion will be considerably higher than noise.  Just getting to -120dB distortion levels requires an almost heroic effort even at low power levels.  Testing 20+ bit converters to this level of performance requires considerable effort.
 

Offline NiHaoMike

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Re: Low noise Piezo stack driver amplifier design
« Reply #11 on: August 21, 2021, 01:54:12 am »
Take a look at amplifier designs for electrostatic headphones, which are similar but a little higher voltage and lower current.
Cryptocurrency has taught me to love math and at the same time be baffled by it.

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Offline dzsekiTopic starter

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Re: Low noise Piezo stack driver amplifier design
« Reply #12 on: August 21, 2021, 04:35:28 am »
Well, I don't think the amplifier has to do 3kHz at. 130Vpp on 10uF. There are off the shelf Piezo stages with resonance frequency of this range, but looking at their cabling it is hard to believethey can do that...
The application would be Scanning Probe Microscopy. So the main target would be able to scan small areas with reasonable resolution, while the stage is capable of 50-100um movement.
So realistically higher speeds would only occur with limited output range.
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Offline T3sl4co1l

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Re: Low noise Piezo stack driver amplifier design
« Reply #13 on: August 21, 2021, 07:42:27 am »
So, raster waveforms typically?

I recall Win Hill (of Art of Electronics fame) saying that constant current drive can be better for piezos, because it's the charge that actually makes the motion; whereas there's hysteresis in voltage.  Plus, it's a capacitor putting an enormous pole in the control loop; charge can be done more or less instantaneously, without regard to mechanical resonances (so long as the compliance range of the current source is sufficient to handle any transient voltage developed by the element or wiring).

This may in turn be harder to close the loop on (you get an integrator for free, between current and position -- more precisely, except for leakage current, current is proportional to velocity), so again it's a very important question whether you have a good position sensor or what.  But it should at least be feasible to get reasonably linear ramps or staircases.  You might also afford a longer "retrace" period, during which settling to a known terminal voltage, or sensor position, is performed.

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Offline dzsekiTopic starter

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Re: Low noise Piezo stack driver amplifier design
« Reply #14 on: August 21, 2021, 12:04:12 pm »
Yes, absoultely raster waveforms!
Historically trace and retrace periods are equal and the the picture is taken in both directions (but handled separately). I was also thinking about putting the piezo within the feedback loop of the driver amp, which inherently would make it stable, even more so because some DACs have outright current outputs so for those this apporach would fit directly, but as you say from "software side" the driving logic would be a little bit abstract, besides none of the off the shelf solutions do this, so there must be a reason for it...

The problem of the feedback is also not so simple. All of the compact piezo stages either employ strain gauge feedback, or capacitive distance sensors. Either way they are not not better than the piezos themselves so they can be used for linearizing the higher displacements, but at small movements the control loop introduce noise, so after all make more harm than good. The rule of thumb is that when small area is scanned the system is in open loop, the piezos aren't that bad there either.

I have also done some market survey, and I don't see much magic about the amplifiers themselves.
This one is so small that I doubt there was heroic effort in its construction:
https://www.piezodrive.com/modules/pdu150/
Or this one, I'm sure it is not much more than a ADHV4702 or the like:
https://www.piezodrive.com/modules/pdu100b-miniature-piezo-driver/
I also drew back the schematic of an industrial piezo stage driver (the schematic may contain mistakes eg. the LM4040 is surely installed the other way...). With this it looks like the designer have intended some low noise behaviour by using the SSM2220 dual transistor, but the advantage of these transistors are probably swamped by the thermal noise of the resistors around, other than that it is a pretty conventional amplifier design.



« Last Edit: August 21, 2021, 12:08:14 pm by dzseki »
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Offline Marco

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Re: Low noise Piezo stack driver amplifier design
« Reply #15 on: August 21, 2021, 01:38:28 pm »
You can just replace the SSM2220 with a low noise low voltage opamp and reduce the resistance of the feedback loop and then you don't need a high voltage opamp any more. No bootstrapping necessary either. This is what T3sl4co1l meant and I repeated with using class A with (class AB) current booster.

Though I doubt single MOSFETs will take all the power, is probably going to need a couple on a very chunky heatsink with a fan (also might want to bias them with pots to better balance cross over distortion with static power consumption).
« Last Edit: August 21, 2021, 02:08:38 pm by Marco »
 

Offline dzsekiTopic starter

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Re: Low noise Piezo stack driver amplifier design
« Reply #16 on: August 21, 2021, 02:36:58 pm »
That circuit was not meant to be really high power either since the FETs only had a very small "clip on" heat sink, also you could guess that by the value of the source resistors too.
It is interesting it has the IRF9530, which is a 100V device, the totalsupply voltage is almost twice of that.
« Last Edit: August 21, 2021, 02:40:09 pm by dzseki »
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Offline mawyatt

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Re: Low noise Piezo stack driver amplifier design
« Reply #17 on: August 21, 2021, 02:40:11 pm »
Our custom design from a few years ago used a high impedance bipolar transistor output to drive the capacitive load, and OP-27 or OP-07 was the center of the amp design and the feedback was thru another amp, differential configured OP-07 or OP-27. The position feedback bridge wasn't located on the piezo elements, but along the movement "path"...so some mechanical delay involved. The driver amp was configured as an asymmetrical output (capable of +200V to -30V) to limit the negative swing, which can cause damage to piezo elements when they compress. These are under compression in the "forward" direction, and should be operated in compression. Initially we were going to use a 20 bit DAC, but decided on a 16Bit which worked well.

The Physik Instrumente OEM driver amp was based upon a low impedance MOS output, also worked well and was quicker in response than the high impedance amp. We designed a custom 16bit DAC based interface for this OEM amp, and all the "systems" worked with a RPi.

The piezo elements have huge hysteresis, highly non-linear capacitance, highly temperature dependent and work in reverse (produce an output with applied force), so fixturing, loading, orientation and external vibration must be carefully considered.

The optical technique we utilized to verify nanometer levels of position was based upon image correlation, not laser techniques. A grey scale print produces random laser printed patterns with tiny fused plastic/carbon high contrast particles on white print paper. This paper was bonded to a low TC glass slide and allowed to "settle" for a few weeks. After this the slide was placed orthogonal to the optical imaging axis, a series of high resolution images (~45MP per image) captured with a high resolution objective lens (Mitutoyo 10, 20 50X). The piezo element was commanded between images and allowed to settle, both high speed strobe and continuous (LED) illumination were tried. A carefull setup is required to reduce any temperature, air flow, vibration, movement, and other issues which would corrupt the results, including the minute thermal effects of illumination.

After the images were collected, they were processed in an image stacking package called Zerene we used for our high resolution chip images. This technique looks at in-focus areas and attempts to align features mainly to increase DoF, however our use was to align high contrast features of the tiny print particles randomly scattered throughout the images. By correlating each image, and recording the alignment parameters, the amount of movement can be reveled necessary for realignment of each image, one on top of the other. This technique worked very well, can resolve small fractions of an image pixel, allowing image position movement resolutions in nanometers regions, and required no expensive or additional measurement equipment, in fact we already had everything necessary to do such :-+

Anyway, hope some of this helps.

Good luck with your project, sounds like an interesting endeavor.

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Offline Conrad Hoffman

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Re: Low noise Piezo stack driver amplifier design
« Reply #18 on: August 21, 2021, 04:45:45 pm »
Back in my AFM days we used a PZT tube, several inches long, maybe half an inch diameter, silvered on four quadrants. It was mounted vertically and raster scanned by bending, with the sample on the top. Real high voltage PZT for real men, none of this safe low voltage multi-layer new-age stuff. >:D  There's a tiny Z component in the motion, but over the travel is was negligible. I came up with an idea that seemed useful and worked in tests, but was never adopted. It's possible to put a small sample of PZT, operating at the same field as the scanner, in the feedback, to cancel out the hysteresis and drift at any frequency. I remember something about a bridge configuration, but it was a long time ago. One can also put a ball bearing in some Sorbothane and stuff it in the top of the tube to kill resonances.
 
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Offline RoGeorge

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Re: Low noise Piezo stack driver amplifier design
« Reply #19 on: August 21, 2021, 05:56:27 pm »
The application would be Scanning Probe Microscopy. So the main target would be able to scan small areas with reasonable resolution, while the stage is capable of 50-100um movement.

Then you might DIY an XY stage based on piezo impact drive.
http://www.aml.t.u-tokyo.ac.jp/research/pidm/pidm_e.html

That would consist in two blocks of metal (similar with machinists' Gauge Blocks) sitting one on top of the other, one metal block for X axis movement, and the other for the Y axis.  On each block of metal, sideways, stick a small piezo to the metal block, and a weight on the other side of the piezo, so you make a small "piezo hammer" attached sideways, one piezo hammer for each of the X-Y blocks of metal making the micro-stage.

You drive the piezo hammers with a saw-tooth waveform, and the displacement on each axis is proportional with the number of pulses, or else said with the number of hammer hits.

This setup can make an XY stage of virtually any size, with uniform positioning and nanometer resolution.

It works based on friction and inertia, because static friction is higher than moving friction, like an inertial motor.  Can even work with liquids if you'd ever wish a floating XY stage.  ;D

The driving voltage distortion/waveform doesn't matter, as long as it has the same shape for each saw-tooth pulse.  Both the mechanics and the electronics can be done at DIY level (the stage can be made of pieces of plastic, or glass, etc. doesn't have to be precise machined blocks of metal), many orders of magnitude cheaper than any commercial microstage or piezo actuator.  Piezo actuators can be any cheap piezo material, e.g. piezo disks from singing post-cards, etc.

If the end application is AFM, then maybe the suspension used in optical heads from CD/DVD would be better suited than a piezo microstage, there were some projects doing just this, some open source, some to buy, e.g.
https://youtu.be/5bqujaldaCQ

Offline mawyatt

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Re: Low noise Piezo stack driver amplifier design
« Reply #20 on: August 21, 2021, 11:05:39 pm »
It works based on friction and inertia, because static friction is higher than moving friction, like an inertial motor.  Can even work with liquids if you'd ever wish a floating XY stage.  ;D

One of the benefits of using piezo elements with flexures like the PI devices, rather than moving surfaces, there is no surface to surface movement, so no noise or "stiction" with flexures. The individual piezo elements are stacked into long, thin elements and held in place in compression. This doesn't move against the two mating stainless steel surfaces, only movement is along the main axis as it expands with applied voltage. 

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Offline David Hess

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Re: Low noise Piezo stack driver amplifier design
« Reply #21 on: August 22, 2021, 12:34:01 am »
Well, I don't think the amplifier has to do 3kHz at. 130Vpp on 10uF. There are off the shelf Piezo stages with resonance frequency of this range, but looking at their cabling it is hard to believethey can do that...
The application would be Scanning Probe Microscopy. So the main target would be able to scan small areas with reasonable resolution, while the stage is capable of 50-100um movement.
So realistically higher speeds would only occur with limited output range.

Gotcha, so the small signal bandwidth is 3 kHz but the full power bandwidth can be considerably lower.

I also drew back the schematic of an industrial piezo stage driver (the schematic may contain mistakes eg. the LM4040 is surely installed the other way...). With this it looks like the designer have intended some low noise behaviour by using the SSM2220 dual transistor, but the advantage of these transistors are probably swamped by the thermal noise of the resistors around, other than that it is a pretty conventional amplifier design.

That is a standard class-AB amplifier but the temperature compensation could be improved.  See below.

The emitter ballast resistors are needed to lower transconductance of the error amplifier so that the compensation capacitance can be reduced to increase the full power bandwidth.  This also increases the input noise significantly but that does not normally matter in most applications.  The resistors can be removed, tail current trimmed for lowest noise, and then compensation adjusted for stability.

The single trimmed Vbe multiplier cannot temperature compensate the combined variation of threshold voltage of the output MOSFETs.  Either two trimmed Vbe multipliers in series can be used or some other structure as shown below.

The second example is what I would do but with bipolar transistors instead of MOSFETs and in a different form to include output current limiting, but that is how I roll.  The operational amplifier requires cascodes in its supply lines to drive the high voltage output stage which are not shown.

As pointed out earlier, compensation to drive a pure capacitive load is "fun", and should not be underestimated.  One way, and what I might try first, is to change the standard -6dB/octave -90 degree integrator to a -3dB/octave -45 degree integrator.  This sacrifices bandwidth but can drive a capacitive load.

Update: I almost forgot but Q1 in the second example should be NPN and not the PNP shown.  The circuit is a Vbe controlled current source analogous to a Vbe multiplier.
« Last Edit: August 23, 2021, 03:33:57 am by David Hess »
 
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Offline T3sl4co1l

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Re: Low noise Piezo stack driver amplifier design
« Reply #22 on: August 22, 2021, 05:35:47 am »
Then you might DIY an XY stage based on piezo impact drive.
http://www.aml.t.u-tokyo.ac.jp/research/pidm/pidm_e.html

Neato.  There's also piezo wave motors, not uncommon these days -- even back in 2003 my digital camera had such a motor for slow and quiet zooming (plus a conventional motor for fast zooming, available while shooting but disabled for video). :)

Don't know too much about them but I imagine a bi-linear one could be made out of, it'd basically be zebra strips of piezo on the bottom (sliding) face of the stage, probably one parallel with each edge of a square base, something like that.

As I understand it, the motion is akin to caterpillar feet, so the position can be controlled smoothly and precisely just as microstepping a stepper motor (replacing current with voltage).  It should also have motion proportional to amplitude times frequency, give or take some minimum amplitude determined by surface energy, smoothness, etc.

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Offline Conrad Hoffman

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Re: Low noise Piezo stack driver amplifier design
« Reply #23 on: August 22, 2021, 04:56:57 pm »
Me thinks people don't appreciate how smooth the motion has to be for SPMs. IMO, only single extension and flexure devices need apply. Anything cyclic is going to produce artifacts. For the same reason, even though PZTs are maybe 8-bit devices when it comes to precision, you probably want 16-bits just for smooth motion and to avoid exciting unwanted resonances.
 

Offline RoGeorge

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Re: Low noise Piezo stack driver amplifier design
« Reply #24 on: August 22, 2021, 05:45:46 pm »
Sorbothane

Didn't know what's that, so googled it:



 ;D
 
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