| Electronics > Projects, Designs, and Technical Stuff |
| Low Voltage Detection & Power Cut IC |
| << < (11/14) > >> |
| GeorgeOfTheJungle:
The clamping diodes ought to come before the current limiting resistors. IOW move R4 to the right side of D3/D4, R3 to the right side of D1/D2, etc. And I'd put clamps + Rs at both ends of the wires. |
| JDW:
--- Quote from: GeorgeOfTheJungle on September 06, 2019, 06:22:41 am ---The clamping diodes ought to come before the current limiting resistors. IOW move R4 to the right side of D3/D4, R3 to the right side of D1/D2, etc. And I'd put clamps + Rs at both ends of the wires. --- End quote --- Thank you for the advice! By the way, what do you think of my NPN switching of RB7 (pin 10)? It's working fine in my breadboard bench testing, passing data both ways. I've tested it with Vcc=2.9v and it works fine at that low voltage too. There is a 400mV voltage drop across CE, which is the only minor caveat I'm finding, but again, the two-way data exchange still works fine. In other words, if Vcc=2.9v, RB7(Tx) would also be 2.9v, but F.SensorRx would be 2.5V. And at Vcc=3.3v, RB7=3.3v & F.SensorRx=2.9v. That remains true even if I put RB7 on the Emitter and F.SensorRx on the Collector. (Removing the 470-ohm resistor doesn't affect the 0.4v drop -- it's definitely the drop across CE.) Again, it's working well. It's just that I've not found any other schematics or designs online that show someone else out there has done something similar to switch logic signals across CE of an NPN. |
| GeorgeOfTheJungle:
I don't understand why do you want or need to switch the sensor's RX line. |
| JDW:
--- Quote from: GeorgeOfTheJungle on September 06, 2019, 07:09:49 am ---I don't understand why do you want or need to switch the sensor's RX line. --- End quote --- For now, let's pretend you (like me) want to cut an Rx or Tx 9600bps data line (reason doesn't matter) and you use NPN as shown in my schematic. Would that circuit satisfy you; and if not, why not? By the way, I added a 100k-ohm pull-up to compensate for the 0.4V drop across CE. That is shown in the revised schematic below. 100k is large enough to ensure the F.Sensor won't be powered by Vdd through that pull-up. I also moved R3/R4/R5 per your recommendation. |
| Ian.M:
--- Quote from: JDW on September 06, 2019, 03:00:42 am ---Below is the simplified schematic of what I am testing on a breadboard -- "simplified" in that it leaves off my 3V relay, LEDs and other less relevant devices for greater clarity. <snip attachment> --- End quote --- Fix your designators!!! Half the components have no reference number and there are two instances of R5 with different values. |O :palm: Simplified is not good - Most of the professionals here are experts at reading complex schematics, and it avoids a lot of confusion if you show us the schematic you have actually built, (or that you *believe* you have built). --- Quote from: JDW on September 06, 2019, 03:00:42 am ---I don't have any MOSFETS in my parts stock, so I breadboard-tested with a PNP. The PNP works great to kill power to the F.Sensor when Vdd dips below 2.81v, but the PNP's base resistor results allows a continuous 4.2mA current flow as long as the Base is LOW (fed by the Comparator1 OUT), which is most of the time. If using a P-MOSFET will eliminate that 4.2mA then I should use a FET instead. --- End quote --- You do need to get some MOSFETs, but we understand that organising a parts order and wating for it takes time and its useful to be able to push on with a substitute. However IMHO you haven't got enough base drive for the 2SD772. The rule of thumb for a single BJT saturated switch, is use a 'forced Beta' of 10, i.e. Ic_max/Ib should equal 10. Therefore for a peak load current of 75mA, you should be providing a minimum of 7.5mA base current. Replacing the 620R resistor with a 220R one will improve matters, at the expense of power consumption, which is irrelevant when breadboarding with a mains PSU. --- Quote from: JDW on September 06, 2019, 03:00:42 am ---Using an NPN to break Tx in the manner shown in the schematic actually works, and signal integrity looks fine on the scope, but I am unsure if that's a sound approach -- it is a bit different than what forrestc recommended in (1) of his earlier post. --- End quote --- If you get the right transistor, designed for reversible switching applications, with a high reverse hFE, its viable, but its still going to compromise the logic levels at the sensor and the signal's falling edge. Can you afford to throw away noise margin? --- Quote from: JDW on September 06, 2019, 03:00:42 am ---My switching power supply has internal protection against the output (3.3v@250mA) being shorted to ground, so I think the PNP's collector (which powers the F.Sensor) should be OK as shown on the schematic. Leaving Ground as a straight-through connection between boards is probably okay as well for the same reason. And the 3 signal wires have basic diode ESD protection with resistor as shown (for the PIC side circuit board). --- End quote --- The time to design in and test over-current protection for the sensor supply is *now* while you are still breadboarding. Relying on your 3.3V switching PSU to limit the current is foolish, as 250mA is plenty to destroy ICs if it gets shorted to an output pin, and the internal bulk decoupling capacitor at the PSU output can probably transiently supply several amps or even tens of amp, if shorted. Also 1N4007 diodes aren't very good for ESD protection - too slow, too high Vf, and too much junction capacitance loading your signals. To be fully effective at eliminating CMOS latchup, external ESD protection diodes must clamp at a low enough voltage for the internal parasitic silicon diodes in the CMOS ICnot to conduct significantly. That means your clamping diodes need a Vf below 0.7V while carrying a significant current pulse, so Schottkys are frequently preferred. BAT54S is a good SMD choice here, with two series diodes in a single three pin package, or axial glass wire-ended BAT81, BAT82 or other similar small signal, low to medium voltage Schottky for breadboarding. George is half right* - the purpose of the resistor between the clamping diodes ant the IC pin is to limit the current into the pin when, at the peak of the ESD strike surge, the clamping voltage goes more than 0.6V outside the rails, but you still need another resistor in series with the signal, the other side of the clamping diodes, between the clamp and the external connection at risk of ESD, to keep the peak ESD strike current down to what the clamping diodes can actually handle (transiently). * Maybe a bit more than half right: if you only have space for one resistor and the Vcc supply is current limited, the CMOS chip may well be able to survive latchup and return to normal after power cycling, but if you don't limit the peak ESD discharge current and the ESD protection diode shorts out, its game over! --- Quote from: JDW on September 06, 2019, 03:00:42 am ---I've not had time to do the CLC or the PIC internal voltage division (to eliminate R1 & R2) that forrestc suggested, but I intend to do that soon and will report back at that time. --- End quote --- We'll be waiting for an update. We are also still waiting for the bench and breadboard photos so we can see if there are any more obvious howlers like the test lead EMI pickup issue, that we could warn you about before you waste more days! |
| Navigation |
| Message Index |
| Next page |
| Previous page |