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Low Voltage Signal Conditioning Theory Question

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Kleinstein:
Another low noise JFET OP is the ADA4625.

For even lower noise one could use discrete JFETs like SK3557, especially in a single sided amplifier as opposed to the differential input stage in an OP. The frequency range is not that different from AM radio.
I attached an NBS paper on such an discrete amplifier that may be interesting.

Evan.Cornell:
So searching for devices with Vn <= 4nV/rt(Hz), and In <= ~100fA/rt(Hz), I find a couple of options:

ADA4625, previously mentioned
    3.3nV/rt(Hz)
    4.5fA/rt(Hz)
    max Av=90V/V for BW=200kHz
    Iq=5mA
AD8655
    2.7nV/rt(Hz)
    ADI parametric search shows 1fA/rt(Hz), but then that spec is nowhere in the datasheet. Their forums show other people asking, but no official answer besides "10s of fA/rt(Hz) around 10kHz, up to low hundreds of fA/rt(Hz) at lower frequencies" (https://ez.analog.com/amplifiers/w/documents/1686/ad8655-current-noise-density)
    max Av=140V/V
    Iq=5.3mA
OPA607 (pre-release part from TI)
    3.8nV/rt(Hz)
    47 fA/rt(Hz)
    max Av=250V/V
    Iq=1mA
OPA828
    4nV/rt(Hz)
    1.2 fA/rt(Hz)
    max Av=225V/V
    Iq=7.9mA
OPA827
    3.8nV/rt(Hz)
    2.2 fA/rt(Hz)
    max Av=110V/V
    Iq=6mA

It seems like AD8655 is the best of the bunch in terms of voltage noise, but without any sort of characterized spec on current noise density, I'd be hesitant to use it. So then, ADA4625 looks like the best realistic bet. All the other op-amps/instrumentation amps with lower voltage noise seem to all have much higher current noise densities that wipe out the gains, based on the impedance of my sensor.

If I were to use ADA4625-2 (dual version), use the first amp to get all the gain, and then second amp to invert that amplified output, so signal chain is fully differential after that point, the benefit would be in rejecting any common mode noise coupling into signal chain. Is there a realistic benefit to that approach, or is maintaining single-ended until I get to a fully-diff-amp to drive ADC inputs a more realistic topology?

Kleinstein:
The AD8655 is a CMOS OP, so the current noise should not be that large - 100 fA/Sqrt(Hz) would be very high for a non chopper CMOS amplifier. Chances are high the noise is in the 0.1-10 fA range, so nothing to really worry about.
So it is a very real option, especially if 5 V supply a favorable.
For lower noise one could consider 2 amplifiers in parallel.

Doing the single ended to differential step after the first stage can have some benefit, as this tends to avoid ground reference and ground currents from later stages. However the extra inverter is an odd way. The more natural way is to use a second stage with differential output. So the conversion would be part of the 2 nd stage. Internally those amplifiers tend to be differential from the start, not just at the output.

One may not need more than 2 stages anyway, maybe 3 if more anti aliasing filtering is needed.

Marco:
How dependable are the noise corners on CMOS amplifiers? They can be low noise, but the noise corner is all the way up to 10K in the datasheet ... don't want it to go any higher.

Evan.Cornell:

--- Quote from: Marco on December 27, 2019, 09:45:42 pm ---How dependable are the noise corners on CMOS amplifiers? They can be low noise, but the noise corner is all the way up to 10K in the datasheet ... don't want it to go any higher.

--- End quote ---

Hence my concern, since the current noise vs. freq. isn't plotted in the spec sheet for AD8655. However, the ADA4625-2 and AD8656 (dual version) both share same package and pinout, so if I can get away with 5V unipolar rail for both, then I can probably use them interchangeably.

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