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Low Voltage Signal Conditioning Theory Question
Evan.Cornell:
If I have an amplifier circuit (say ADA4945-1, with Input Noise Figure of 1.8 nV/√Hz, f = 100 kHz) and an amplifier bandwidth of 200kHz, that implies total noise level of 1.8nV*sqrt(200k)=805nV.
Does that mean that my desired input signal must be greater than that noise level by enough to give me desired ENOB? I have seen posted elsewhere 6dB per ENOB as a rule of thumb.
So for instance, if I need to digitize the input signal to ADA4945-1 at ENOB=5, then my input signal ought to be at least 805nV*10^(5*6/20)=25.46uV.
Furthermore, if the signal I need to digitize does not use that entire bandwidth, say it's only 10kHz wide, somewhere within the 200kHz passband, and I can digitally bandpass filter the digitized signal, then my minimum input signal level would decrease to 1.8nV*sqrt(10k)*10^(5*6/20)=5.69uV.
Are these lines of reasoning correct?
T3sl4co1l:
Yes, as long as the quantization noise is evenly distributed (roughly, that the noise + signal is larger than a few LSB so that dithering occurs naturally) and you have enough extra bits in the DSP filters (so that SNR isn't lost to rounding).
Note also that, if the amplifier's noise bandwidth is more than 200kHz, and the ADC's sampling aperture or analog bandwidth is more than 200kHz, then noise beyond the desired bandwidth can be aliased into the samples. Design the filter so that the noise at the ADC input is within this limit (or, use an ADC that isn't susceptible to aliasing, such as an integrating or S-D type).
Tim
Marco:
Rule of thumb for the multiplier for peak to peak noise from RMS varies between 6-8.
Kleinstein:
At the relatively low noise level one should also check other noise sources, like the signal source itself and resistors in the feedback part. The 1.8 nV/Sqrt(HZ) about corresponds to a 100 Ohms resistors.
Evan.Cornell:
All very helpful information, thanks!
My application requires high input impedance (think >=100kOhm), therefore fully-differential amplifiers are out of the running, at least as the first stage. Because I would like to maintain a fully-differential signal path, I am looking at implementing Cross-Connected Instrumentation Amplifier using 2x AD8429, see here for hookup: https://www.analog.com/en/analog-dialogue/raqs/raq-issue-161.html
My goal here is to be able to be able to digitize a 40uVpp input signal (~200kHz max bandwidth) with an ENOB>=5. I believe with AD8429 gain=~600, the input referred noise should be somewhere between 1nV/rt(Hz) and 2nV/rt(Hz), thus 871nV total noise at DiffInAmp input (does that work out to be nVpp or nVrms when coming from Noise Density parameter in spec sheet?). 871nV*10^(5*6/20)=27.6uV minimum signal level to get ENOB=5. Take that 27.6uV minimum input signal times gain of 600, that's 16.54mV. ADC I am using is 24-bit, with noise level of 10uVpp. I don't need gain of 600 to get to correct ENOB level, but I do think I need the gain level that low to keep the input noise of the DiffInAmp low enough.
I also want to have some passive high-pass filtering between sensor and AD8429. To get f_3dB=~3.4kHz, I get C=4.7uF, R=10ohm, trying to keep resistor value low to reduce noise contribution. Question: what capacitor characteristics should I look for in terms of low noise differential signal path?
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