9 bit CPU daydream

[tggzzz]

Why can't there be a 9 bit CPU? For example, the Commodore 64 has a horizontal video resolution of 320 pixels so any math involving moving across the screen involves carry bits and extra instructions. The video chip has the high bits of sprite positions in another byte, so moving each sprite requires addressing a bit in this byte to position it.
...
So what if there is a 9 bit 6502 so that everything could fit into a 9 bit byte?

The first (mini)computer I used had a 39-bit word containing 2 18 bit instructions plus a modifier bit.

Many mainframe computers had 6 bit bytes.

When it comes to data (not instructions) the interaction between addresses, instruction coding entropy, and convenience/performance, there are many advantages to keeping everything powers of two.

Harvard computers frequently have different width instruction busses and data busses.

[coppice]

Many mainframe computers had 6 bit bytes.

7 bit bytes, just large enough for a Romance character, were common, but who used 6 bit bytes?

Harvard computers frequently have different width instruction busses and data busses.

True Harvard machines (most machines are now kind of Harvard, since the CPU works from a pair of instruction and data caches), especially DSP ones, rarely have instruction and data bus lengths that match. As soon as you decide to split the memories in a Harvard style it rarely makes sense for them to be the same size. We just start to think it does when we spend too much time with Von Neumann machines.

[tggzzz]

Many mainframe computers had 6 bit bytes.

7 bit bytes, just large enough for a Romance character, were common, but who used 6 bit bytes?

ICL/ICL 1900 series, 4 bytes in a 24-bit word.

Harvard computers frequently have different width instruction busses and data busses.

True Harvard machines (most machines are now kind of Harvard, since the CPU works from a pair of instruction and data caches), especially DSP ones, rarely have instruction and data bus lengths that match. As soon as you decide to split the memories in a Harvard style it rarely makes sense for them to be the same size. We just start to think it does when we spend too much time with Von Neumann machines.

Just so.

Von Newmann machines have the significant advantage that you can naturally interpret a number as either data or instructions. Nowadays that's also a significant disadvantage.

[xani]

We as humans like patterns, and we seem to like 8-bit and multiples thereof. For example, we went from 32-bit to 64-bit x86 CPUs years ago. Why 64-bit, and not 40 or 48-bit? Doubling every data path and memory bus must have been quite expensive.. Oh, and the promise was that computers would get twice as fast. Well, that didn't really happen just because of this transition...

To be fair no modern 64 bit processor have physical address bus actually 64 bits wide. My desktop has

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address sizes	: 39 bits physical, 48 bits virtual

while fat server AMD Epyc has

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address sizes   : 43 bits physical, 48 bits virtual

I think I also saw some clever use of the  "free" 16 bits to encode extra data, or even lower bits (so called tagger points) in places where you need to have aligned access anyway so they would normally always be 0

[tggzzz]

We as humans like patterns, and we seem to like 8-bit and multiples thereof. For example, we went from 32-bit to 64-bit x86 CPUs years ago. Why 64-bit, and not 40 or 48-bit? Doubling every data path and memory bus must have been quite expensive.. Oh, and the promise was that computers would get twice as fast. Well, that didn't really happen just because of this transition...

To be fair no modern 64 bit processor have physical address bus actually 64 bits wide. My desktop has

At the ISA level the physical address bus is unimportant. The virtual address space is what matters.

[Berni]

Well implementing a full 64bit wide address bus is just way too much addressing space than any computer today would need.

But the width of a bus often has nothing to do with the "number of bits" of a CPU. For example have a look at the Intel 8088 CPU. It is a version of the 16bit Intel 8086 with a 8bit memory bus (Because 8bit RAM and motherboards ware cheaper back then).

The Pentium 3 CPUs typically used DDR1 DIMMs as RAM. These DIMMs have a 64bit data bus even tho all Pentium 3 processors are 32bit, but if you are running dual channel memory you technically have a 128bit RAM. Tho that is the width of the chipsets memory controller, but still the FSB bus on the CPU pins also has a 64bit data bus, but has a 36bit address bus. So nothing is actually 32bit about its buses. But then you also have the Pentium 4 that is the first Intel consumer CPU to go 64bit, yet it fits on the same FSB bus.

If you look at GPUs they have 256bit 384bit 512bit memory buses, yet nobody said this is a 512bit graphics card. They simply needed the extra memory bandwidth that such a wide bus can provide.

So the bus size is simply what the chip designers found it to be an appropriate compromise between number of pins, bandwidth, complexity etc.. for the job it does.

The number of bits on a CPU can be open to interpretation sometimes, but in most cases it is pretty clear as the largest word size the CPU can work with using the majority of its instruction set. So an Intel i7 with AVX512 is not a 512bit CPU because all the other standard ALU operations are still 64bit. So the ability to work with 512bit is just a special case limited to some special instructions.

[SiliconWizard]

The number of bits on a CPU can be open to interpretation sometimes, but in most cases it is pretty clear as the largest word size the CPU can work with using the majority of its instruction set. So an Intel i7 with AVX512 is not a 512bit CPU because all the other standard ALU operations are still 64bit. So the ability to work with 512bit is just a special case limited to some special instructions.

Yes, this is a relatively common topic and has already been discussed here from what I remember.

The reasonable answer, of course, for a definitive and general definition of a n-bit CPU, is that there is no such formal definition. It's basically up to the designers of the CPU, and has sometimes been used as a marketing tool.

That said, I agree that the most common use of this term is neither for the data bus width nor for the address bus width, but for the width of the general-purpose registers of a given CPU (and, usually again, the width of the ALU inputs). Of course that applies to... the most common architectures. There are some odd architectures out there (there aren't now as many as there used to be in the past) that have different sets of registers with different widths for different internal uses, so in this case it becomes hard to properly define "n", but in many cases it's relatively obvious. As you said, registers used for vectored operations usually don't count for this; they are not general-purpose and can be used only for a restricted number of uses. But you may still debate "n". OTOH, on a classic RISC processor with no vectored operations, registers usually all have the same width and it becomes relatively non-ambiguous.

And there are a lot of examples of CPUs with various data and address bus widths not related to "n". The 8088, 68000, 68008... for the data bus (and probably many more), and still most processors these days regarding the address bus. The 8088 was considered a 16-bit processor (with an 8-bit data bus), the 68000 a 32-bit processor with a 16-bit data bus, the 68008  a 32-bit processor with a 8-bit data bus (externally, but still 16-bit internally?), and neither had an address bus with a width corresponding to "n".

[DiTBho]

the 68008  a 32-bit processor with a 8-bit data bus (externally, but still 16-bit internally?)

8 bit on the CPU bus interface, 32 bit on the CPU data-path and registers.

[tggzzz]

The idea of designing a completely non-standard architecture like this just to accomodate some particular cases that have good chances of being relatively short-lived doesn't make sense from an industrial POV. 9 bits because of a 320-pxel wide resolution? And now if the new line offered 640 pixels instead, they would design a new 10-bit CPU? Really?

The very fact many companies making home computers used the 6502 at the time was that it was available, it was CHEAP and easy to deal with. Software tools also already existed. Designing their own CPU instead would have made little sense. What was a lot more common was designing custom chips for specific functions - which was not only easier to do, easier to integrate, designed to exactly solve a set of issues instead of twisting a CPU for a mediocre result...

Acorn made computers base d on the 6502, and decided to take the bits they liked when they designed their proprietary CPU. That was, of course, the ARM1.

[Sky Shark]

Acorn made computers base d on the 6502, and decided to take the bits they liked when they designed their proprietary CPU. That was, of course, the ARM1.

Yes, personally I find 6502 & ARM the two most enjoyable micros to write assembly for.  (I grew up on 6502, both 6502 & ARM feel natural to me)

[grumpydoc]

I half agree - the tiny amount of ARM assembler that I did suggested that it was, as you say, a really nice architecture to work on.

Always loathed the 6502 though.