Matched transistors for analog experiments

[Limhes]

I second the BCM8xx solution. These are the only reliably sourceable option imho, even with some pin-to-pin alternatives.

I used them to build discrete Wilson current mirrors to bias a lateral PSD (2D photodiode, kind of). A visiting electronics engineer (an "oldie") was visibly impressed by me, a " youngster", building a discrete front-end in favor of the (legacy) implementation with 6 stacked (expensive and out of stock) voltage references and Frankenstein TIA.

[Kleinstein]

i have a curve tracer. hand matching transistors out of a bag isn't all that time consuming. i wonder how easily a curve tracer could be be constructed today with modern parts - you don't even need all the bells and whistles, or even a display; set it up to run a handful of measurements near your expected operating point on two parts at once, and light a led iif they're close enough. might be an interesting project

A limited parameter tester could be build relatively easy. For efficient matching it still makes sense to actually measure the relevant parameters and than after testing some 10 or 20 pieces select suitable pairs that are close together. For this one needs numbers, though no need to be super accurate. For just VBE matching the diode testfunction of a DMM can be good enough, as there is anyway the thermal effect.
For hfe one may get away with the function included with some no so safe cheap DMMs.

[David Hess]

Don't bother hand matching individual parts, its a waste of time. The two devices need to be thermally matched as well - so at very least inside one package, preferably on the same die.

It hardly takes any time, at least the way I do it.  Usually I grade devices for Vbe or Vgs at a reasonable current, meaning every device is placed in a bins of 100 microvolts or 1 millivolt, and then the birthday paradox will quickly result in multiple matched devices.

Then I either clamp multiple devices to the same heat sink, or epoxy them together.

If anything the trickiest part is that self heating during measurement causes the reading to shift.

[RoGeorge]

For manually matching I would probably make a differential pair with sockets for the 2 transistors, and select the pairs with the best common mode input rejection.  No matter how careful they are matched initially, the slightest temperature difference between the two transistors will affect the performance.  Adding a common radiator for the individual transistors helps, but there will still be some thermal resistance that might keep the transistors at slightly different temperatures.

The advantage with factory matched transistors is that they are in very close proximity to each other, often on the same die, which will keep them at a much closer running temperature.  Even so, that will work for pairs only, while sometimes there is a need to match more than 2 transistors.

Ideally will be to be able to make custom ICs. 

Don't know for others, but I'm a little disappointed.  We still can not 3D print at home our own ICs after so many years.  Don't want the finest sub nanometer tech, but something from 50+ years ago should be desktop technology today, one might expect.

Rant aside, even inside the same IC, I've read there are situations where thermal pairing must be treated specially, i.e. precision opamps have a thermal axis of symmetry, where the input transistor are placed in such a way that the heat from the output stage/transistors will spread to the input transistors equally, to not ruin the matching.  IIRC first introduced for uA725.

Took a search to double check that, it was George Erdi:

There are some circuit subtleties belied by the schematic's simplicity, but yet important.
Q1 and Q2 are actually a quad set (dual pairs), with the paralleled pairs straddling the
chip's axis of thermal symmetry. The idea behind this was that thermal changes due to
output stage dissipation would be seen as equal thermally induced offsets by the two
input stage halves, and thus be rejected. This principle, first established in the 725 design,
has since become a basic precision design principle (see Reference 15, again, and within
Reference 23, the Fig. 2 chip photograph).

Source:  page 61 of 970 http://www.miedema.dyndns.org/co/2018/Op_Amp_Applications_Handbook-Walt-Jung_2005.pdf

Well, not that I need any of such near perfect matching performance. 

[HalFoster]

There are still several quad transistor packages made - of course there is the line from THAT as well as AD and others.  Yes, somewhat more expensive than discrete but generally under $10 USD - and probably much cheaper in the long run with much better performance as matched items.

[magic]

Don't know for others, but I'm a little disappointed.  We still can not 3D print at home our own ICs after so many years.  Don't want the finest sub nanometer tech, but something from 50+ years ago should be desktop technology today, one might expect.

The problem is not nanometers but chemistry. It was ugly 50 years ago, it is ugly today, it will stay ugly forever.
You can't 3D print doped semiconductors.

A few people managed to fab basic MOSFETs in home labs.

[iMo]

This guy is doing DIY transistors for many years already 
Many vids on the equipment in his basement as well..

[magic]

I wonder how good bad his Vgs matching is.

[Zero999]

What about the CD4007UB for MOSFETS? I expect it won't be as well matched as specially designed matched pairs, but it's likely to be better than two discrete MOSFETs. There's also the slightly newer HEF4007UB, which might be better.
https://assets.nexperia.com/documents/data-sheet/HEF4007UB.pdf

[David Hess]

For manually matching I would probably make a differential pair with sockets for the 2 transistors, and select the pairs with the best common mode input rejection.  No matter how careful they are matched initially, the slightest temperature difference between the two transistors will affect the performance.  Adding a common radiator for the individual transistors helps, but there will still be some thermal resistance that might keep the transistors at slightly different temperatures.

Differential pairs can be further thermally balanced by adding resistors in series with the collectors to halve the collector voltages.  Then when the pair is unbalanced, the power dissipation stays the same on both sides.  High frequency performance is preserved by capacitively bypassing the resistors.

The advantage with factory matched transistors is that they are in very close proximity to each other, often on the same die, which will keep them at a much closer running temperature.  Even so, that will work for pairs only, while sometimes there is a need to match more than 2 transistors.

Ideally will be to be able to make custom ICs. 

Rant aside, even inside the same IC, I've read there are situations where thermal pairing must be treated specially, i.e. precision opamps have a thermal axis of symmetry, where the input transistor are placed in such a way that the heat from the output stage/transistors will spread to the input transistors equally, to not ruin the matching.  IIRC first introduced for uA725.

Monolithic matching is not a panacea.  Parasitic coupling between the transistors will spoil things like settling time and will spoil performance in high frequency applications, so there is still a place for matched dual parts which provide thermal isolation.  In the past precision fast settling designs used either discrete or hybrid construction.  Monolithic fast settling time parts do not compete and have relaxed accuracy from low open loop gain.

[David Hess]

The problem is not nanometers but chemistry. It was ugly 50 years ago, it is ugly today, it will stay ugly forever.
You can't 3D print doped semiconductors.

A few people managed to fab basic MOSFETs in home labs.

Bipolar parts, especially with an all NPN process, should be much easier.  I remember one guy who was making tunnel diodes in his garage since they are easier yet because of high doping.

[magic]

I have heard that silicon epitaxy is not easy at all (temperature, pressure, fun chemicals like silane) and without epitaxy you are limited to quite primitive discrete devices.

[mawyatt]

Rant aside, even inside the same IC, I've read there are situations where thermal pairing must be treated specially, i.e. precision opamps have a thermal axis of symmetry, where the input transistor are placed in such a way that the heat from the output stage/transistors will spread to the input transistors equally, to not ruin the matching.  IIRC first introduced for uA725.

Took a search to double check that, it was George Erdi:

There are some circuit subtleties belied by the schematic's simplicity, but yet important.
Q1 and Q2 are actually a quad set (dual pairs), with the paralleled pairs straddling the
chip's axis of thermal symmetry. The idea behind this was that thermal changes due to
output stage dissipation would be seen as equal thermally induced offsets by the two
input stage halves, and thus be rejected. This principle, first established in the 725 design,
has since become a basic precision design principle (see Reference 15, again, and within
Reference 23, the Fig. 2 chip photograph).

Source:  page 61 of 970 http://www.miedema.dyndns.org/co/2018/Op_Amp_Applications_Handbook-Walt-Jung_2005.pdf

Well, not that I need any of such near perfect matching performance. 

Eric's cross-coupled quad was a very valuable concept that everyone used, Fairchild really is the origin of all the greatest early semi folks!!

At the IC level other things can creep in that even Erdi's quad can't eliminate. We utilized very complex thermal models for the SiGe BiCMOS processes we were involved with, these included not one but two non-linear device thermal time constants and took into account surrounding circuity and layout of such. These thermal models scaled non-linearly with device type, size, and layout orientation, even location of wire bonds had an effect as they became a thermal sink.

In the end if one required extreme matching, it's always best to use differential techniques, Erdi's quad, symmetrical layout within and around the critical pair. Recall one integrated VCO design where we located a "matched pair" inside a large open center inductor where they would "see" an equal and matched thermal and electrical local environment.

Lots of effort went into thermal modeling even at the device level, including thermal details inside the device, where even doping type, concentration and profiles have effects at the time.

BTW your idea of using a high gain op-amp based diff amp front end for the DUT as the diff amp devices is likely the best means for precise matching., especially if one can reasonably match the desired electrical bias conditions. This is exactly what we did back in ~70 to check selected matched NPN pairs in TO-99 cans that National provided.

Best,