Problem with pulsed output rails on a Howland current source

[nitish111]

I am designing pulsed current source that can sink up to +/-15 mA with +/-100 V rails (schematics attached). I am getting a weird capacitive effect during switching of voltage rails. Then I probed the rails and I saw ripples on them when the current is switching polarity. On the oscilloscope image yellow is the voltage across a constant load of 4.22k @ +/-15 mA, Pink one is the 100V rail and blue one is -100V rail. Can any one please explain me what is causing the ripple and how can I reduce or even get rid of it.

[TiN]

That's rather wierd arrangement. Why not use zener stage for opamp power rails to clamp for low voltages, and discrete power stage at the output to drive load?
Also where are all the decoupling capacitors? It is common rule to decouple all power entry to opamps and regulators, this is good example when it's important.

[coppercone2]

Did you try it on a lab supply first? Trouble shooting a custom PS and AMP at the same time might be hard.

Did you try the hybrid op-amp without the complex feedback in a simple noninverting or whatever?

but, why is the rail changing. it should be invarient lowz. Rail voltage change means impedance fail of some kind. your power supply is either doing something wrong or the chip is drawing a shit load of current.

[SiliconWizard]

I would test your flyback converter separately first with a pulsed load on either rail.

You may have to increase the value of the output caps (C1, C3) a bit? Also I have no clue wether the transformer you chose is really adapted to this task - from the datasheet I got (Sumida), there is no CEP1110 model rated for an output voltage greater than 48V?

[nitish111]

Also where are all the decoupling capacitors? It is common rule to decouple all power entry to opamps and regulators, this is good example when it's important.

I cannot use decoupling capacitor on the VCC and VEE of op-amp since I am using a bootstrap circuit. I used circuit from following paper(figure 4). http://www.ti.com/lit/ml/slyy054/slyy054.pdf

Why not use zener stage for opamp power rails to clamp for low voltages, and discrete power stage at the output to drive load?

Can you please elaborate more what do you mean by this?

Did you try it on a lab supply first? Trouble shooting a custom PS and AMP at the same time might be hard.

Did you try the hybrid op-amp without the complex feedback in a simple noninverting or whatever?

I do not have a lab equipment that can generate 100V DC . Yeah my guess is also same that somehow rail voltages are getting affected.

You may have to increase the value of the output caps (C1, C3) a bit? Also I have no clue wether the transformer you chose is really adapted to this task - from the datasheet I got (Sumida), there is no CEP1110 model rated for an output voltage greater than 48V?

I increased C1 and C3 to 1uF (CGA9P4X7T2W105M250KE), it help reduce it a little bit by 1Vpp. Increasing it to 2uF did not have significant affect. I ordered custom transformer samples from Sumida for the transformer. I am attaching the datasheet for the transformer.