Minimizing the class D distortion

[Kokoriantz]

The main distortion cause in class D amps is the dead time.

The figure shows the open loop simulation of 1khz signal with 400khz switching and 50ns dead time. The output inductor carries a current depending inversely to its value and the switching frequency. When the load peak current is inferior to this current, at dead times, the reverse diodes of the outputs conduct, and the load gets its current from the discharging inductors and every thing goes well. The trouble starts when the load peak current exceeds the reserve current, the load goes floating at dead times and looses an offset current. To resolve this problem, is to detect this zone and add an offset voltage to the input. This what a patent of TI implemented in TPA325X series does.    https://patents.google.com/patent/US7795970B2/en
Much simpler solution is to decrease the carrier frequency current to insignificant level by using a  parallel L-C instead of L in output filter. The figure bellow shows the result with 20uh//(8nF+1ohm). The distortion passes from 2.4% to 0.18%. The 1 ohm is to limit the transient current, without it the distortion is 0.14%.   

Edit by gnif: No need for a thread title that yells (all caps).

[Kokoriantz]

Output filter. The 10uH inductors are to show clean waves.

[Zero999]

Sorry I can't help. I'm interested though. It looks like crossover distortion, which makes sense, since it's a type of dead time.

[CaptDon]

Your example is for a full H-Bridge design which is now becoming very common not only for audio but for many applications like permanent magnet  reversible motors with control loops. Most of the powerful audio amps are still two independent Half-Bridge output stages (Channel 1 and Channel 2) Which can function as a stereo amplifier or as a more powerful 'Bridged-Mono' mode where one channel will be driven 180 degrees out of phase and the load taken across the pair of channels. This allows greater flexibility for the same unit as the user decides what he wants the amp to do. Generally in the half bridge amplifiers there is the main 'restoring inductor' and often in series with the output will be a parallel resonant circuit tuned to the carrier frequency to suppress carrier radiation on the output mainly. I think the suppression tank circuit and the snubbing circuits to suppress destructive overshoots help eliminate the zero crossing dead time distortion since even during dead time there is current moving somewhere. Typical audio amps are 500Khz carrier with quality low distortion response up to 50Khz also showing very fast transient response with very little phase shift in the 20Hz to 20Khz audio range. The Peavey DECA 724 and 1200 schematics are on line and worth looking at how they did the output network. The DECA 524 has a truly weird half-bridge output.

[Kokoriantz]

I simed in SE configuration, The distortion 400khz 50ns dt falls to 1.8% and with tank 0.15%. That is 11 times less distortion in SE than 13 times in BTL.
The TDA8932 has 0.015% in SE for 1W/1khz but falls to 0.007% in BTL. I ordered a circuit board for $2 shipment inc. I will try it out hoping to get 0.0005% with tank.

[Kokoriantz]

I tried this idea on TPA3116d2. The 3$ board in PBTL had 30uH inductors that I replaced them with 10uH and modified the PCB to have them underside. On simulator, at 1W output without resonant tank the distortion  measures 2.5% and falls to 0.06% with resonator, having a series resistor of 10 ohms. That's what I tried. The sound in not too bad without tank but gets harsh classD when multiple high pitch voices shout. With the C-R of 15nF and 10ohms 1W is applied the harshness disappears but the temperature of the chip goes much higher but acceptable and the 10 ohms 1W resistors  becomes untouchable. 

[Kokoriantz]

I replaced the 10ohm 1W with 8.2ohm 5w ordinary "inductive" resistor. The chip got cooled.
I use a floating differential input by a 600/10k transformer. The high frequencies are by far superior  but no bass!
 

[Kokoriantz]

Looking in more detail of TPA3116 I see that this is a different type of classD called BD type considering a standard to be AD type. Here what the DS speaks about.
The main reason that the traditional class-D amplifier-based on AD modulation needs an output filter is that the
switching waveform results in maximum current flow. This causes more loss in the load, which causes lower
efficiency. The ripple current is large for the traditional modulation scheme, because the ripple current is
proportional to voltage multiplied by the time at that voltage. The differential voltage swing is 2 × VCC, and the
time at each voltage is half the period for the traditional modulation scheme. An ideal LC filter is needed to store
the ripple current from each half cycle for the next half cycle, while any resistance causes power dissipation. The
speaker is both resistive and reactive, whereas an LC filter is almost purely reactive.
The TPA3116D2 modulation scheme has little loss in the load without a filter because the pulses are short and
the change in voltage is VCC instead of 2 × VCC. As the output power increases, the pulses widen, making the
ripple current larger. Ripple current could be filtered with an LC filter for increased efficiency, but for most
applications the filter is not needed
 On simulator with 400khz carrier 1W is still 2.5% distortion but as the inductor doesn't have carrier current in it there is no crossover type distortion which makes classD amps sound harsh.
I wired the circuit to its simplest and 1.2Mhz gave very high quality sound. The board is adjusted to 36db gain that's why add 56k resistors to bring it to 20db. Of course the EMI is some problem here to comply FCC rules.

[Kokoriantz]

On simulator I could optimize the TPA3116 class BD type for 400khz. As I mentioned, the transfer function is far different than class AD. It resembles to pentode or mosfet output in class AB where above the class A region the gain increases. As the inductors don't have carrier current, it has very low bias this time, to increase it, I added 3.9nF capacitors to bring to linearity. As shows the distortion numbers, yes in open loop it has 5% THD but look at the relative phases of the odd harmonics, they are opposite phase. These opposite harmonics subtract with the other odd in phase harmonics and what is left after feedback, subtract that of the speaker. I am listening now since an hour with great pleasure.     

[moffy]

The waveform looks terrible for a sine wave. Also if you are modelling a speaker with your 8 ohm resistor, they are much more complex than that, including inductance and frequency dependant components which will interact in real life.

[Kokoriantz]

Indeed, by view it is not a beautiful sine wave. If you low bias a push pull output mosfets with degenerating source resistors you get a similar result. This to show you that the class BD has a different character  than standard class D. bellow is the sine wave of AD and BD mode with lower biased 820pf.
The impedance of the load is in bridge decoupled by 220nF and doesn't effect the  LC resonance of each output. In BD mode the differential output doesn't see the carrier as the outputs have the same phase.

[Kokoriantz]

After listening the sound of classD with my tank distortion reducer and the classBD with bias, for me the classD is dead, long live the classBD. Next week I'll record the sound and post it.

[moffy]

Look forward to listening results. If you have any classical I would appreciate that as a symphony orchestra has both wide dynamic and frequency range that makes it easier to pick up blemishes.

[T3sl4co1l]

Two things:
1. Feed back on inductor current.  Which, with an H-bridge, you might need a Hall effect sensor to facilitate that, though there are current sense amps that will handle pretty generous range, too.
2. Servo the current setpoint based on voltage, thus setting voltage gain and distortion.

#1 runs fast (loop BW somewhat less than Fsw), and corrects for errors due to inverter switching.  This eliminates the above distortion.

#2 runs slightly slower (say Fsw/10?) and sets output impedance, gain and etc.  At high frequencies, it runs somewhat open loop (use pole-zero compensation), for which, the output likewise needs impedance equalization to maintain reasonable output impedance and flatness at the top end (typically a C || (R+C) network).

Splitting the control into two separate loops, also divorces the LC output filter's poles, so that they can be treated separately -- and the whole system can potentially run faster than their cutoff would suggest.

You may prefer voltage-mode control anyway, if Fsw is fairly low; but this should not be a problem here.

Not that this is an SMPS project, but the current limit also provides short-circuit protection trivially, and, on that note, is perfectly usable as an SMPS if you make it DC coupled.


As for the existing design without controls (or voltage mode only), what dead time is it?  You can -- and probably should -- set dead time very narrow, as tight as you can afford given the control and driver circuitry: within 10s of ns should be reasonable.  You likely will have to use a driver that does NOT implement dead-time control itself. 

What you get, with short deadtime, is very little difference between hard and soft switching, and full synchronous rectification with minimal recovery.  The pulses can even be overlapping slightly (negative dead time, as it were), which is equally acceptable, so long as the switching loop inductance is well designed and snubbing is provided.  Yes, rather than minimizing inductance, you may add some instead.  Having it as a lumped element, is easier to snub.  Value is easy enough to calculate: say you're doing 100V 10A output range, well, a peak of say half that or 5A for, let's say the drivers have worst-case +/-20ns timing, is L = V dt / dI = (100V) (20ns) / (5A) = 0.4uH.  And snub that with, let's say Vpk <= 50V so at a maximum peak current of 15A, that's 50V/15A = 3 ohms.  Which can be R or R+L across the inductor, or across each switch, or with a clamp diode, etc.

Tim

[Kokoriantz]

Thank you Tim for so much advice. The dead time I am considering here is 50ns. I simulated with GaN with 5ns, it gives 0.07% THD at 100W in open loop.
What concerns the feedback, the PSRR curves betray the NFB applied as the classD amps rely only upon feedback for power supply ripple rejection.
Below are the curves of TDA8932, TPA3116, and TPA3221 That I suppose the 325x series are similar. The first has only 20db for 20khz and the phase shift is 90°, This result mediocre high frequency performance as it needs minimum 50db to be a good amplifier. The TPA3116 as the block diagram shows is two pole at 1.5khz followed by two zeros at 4khz and gets 55db at 20khz with a phase shift of less then 45°. This results exceptional performance. Unfortunately it was not adopted in 32xx series and gets insufficient 40db.
Bruno Putzeys uses  self oscillating circuit and applies 90db NFB flat to 60khz, as stability is not a problem.   

[T3sl4co1l]

Interesting, double integrator for feedback.  Well, that's guaranteed to oscillate (180 deg. phase shift), but, a class D amp is supposed to, right?

That has the advantage of faster asymptotic behavior; same as (I think?) "noise shaping" on a S-D ADC.  Except it's not clocked as S-D is, but chopped against a ramp in the continuous-time domain.  But I think to much the same end.  Which indeed should give lower distortion to higher frequencies.

Also current sense, but not as cascaded loops as I described, but just for peak current I would guess.  But yeah, that 3116 sounds quite reasonable.

Again, you don't need GaN to look at very short dead time, or indeed interleave; but if you choose to go that way, you can of course get far tighter.  Especially with typical drivers having speed in the few ns range.

Tim

[Kokoriantz]

Few years ago, I applied extra 15db NFB on TPA3116 and recorded comparatively to 300b/2A3C SET amplifier posted on youtube here.
https://www.youtube.com/channel/UCX4dG3sAluj726rIz9XKg1Q/videos 

[Kokoriantz]

I need some advice to understand why the chip is getting warmer.
If it is a normal type with 220nF grounding capacitor, then the switching occurs at +/-700ma, shown on first graph. If I bias in BD mod with 6.8nF for both branches, then the switching occurs at +/-100ma but runs on idle, warmer then in first case. Why?

I was listening all day paying attention on high pitch sounds as there is the most difference.   Unintentionally I passed male voices to be amazed by the rich generous low mid sound reminding me the 8 track or reel tape style sound. No doubt this amp has more tube sound then the 2A3C.
What is for sure, I did not minimize the classD distortion, I evaporated it. The amp now behaves as a class AB type.   

[Kokoriantz]

I tried to decrease the chip dissipation in vain. If something should go hot why not a resistor. So, instead of biasing with a capacitor, I bias now with a resistor dissipating 1W. The resulting wave is more beautiful and the 3rd and 5th harmonics are still opposite phases.
I will determine the value by listening.
If the resistor is shorted, the amp becomes class AD, if cut, it becomes class BD. Should this be class abD   

[T3sl4co1l]

In what way is this component for "biasing"?  Looks like a common mode filter element to me.

Tim

[Kokoriantz]

The bias is not a dc component, it is the carrier current induced in the inductors. This is my invention in class BD. The induced ac current act exactly as the dc bias current in class ab.
This current is not easy to determine exactly as the precedent stage's distortion also interfere.
The TPA3116 has a distortion for 1Khz about 0.025% with at least 60db NFB, this means in open loop it is 25% THD most of it the two differential amps. As the output stage generates opposite phase 3rd and 5th to subtract with the driver's, how much bias is not easy to determine. My distortion measurement doesn't work in differential and only 16 bit.
  A quick trial gave very good sound with 50 ohms heating alone as the chip is cold. Well, if quality is needed, efficiency has to be scarified.
I have a pirate CD of Sinatra, I never could listen with all my dozen of class A and SET amps. For the first time I am enjoying it at this moment.   

[Kokoriantz]

I went through all documents on line about class BD modulation searching about carrier frequency  preference to be high or low, I found nothing. So, I tried it out on TPA3116 switching between 400khz and 1.2M, I didn't find by listening, slightest difference. So better to run at lowest to keep the chip cool. 

[Kokoriantz]

I passed test music to qualify this amp. I took 3 stars without problem. The exceptional low notes as reel band and fluid transparent extreme highs I never heard such. The trouble started by the requiem of Verdi that I attribute four stars, NO NO NO, garbage sound when the choral of 300 voices, 70+ instruments burst. This is due to large phase rotation 1khz-4khz in loop gain. I have already resolved in the passed by driving the inputs with differential current sources. I installed it and yes the Verdi sound good but all the goodies faded out. I don't understand why with differential input I lose the low notes.
I designed a simpler circuit keeping the unbalanced input and provided 26db extra NFB by post filter, adjustable by the emitter resistors, maybe with four extra transistors it will be perfected.
I have no hope that TPA3116 can run stand alone, but the problem is no more class D, just common feedback troubles.       

[Kokoriantz]

Before I proceed with the design, I wanted to be sure about datasheet and sim models. First I found that the inputs are not differential. If I feed the same input to both input, I get exactly the same level the same sound. Probably is the case for PBTL, both inputs have the same polarity  . If either input, instead of being grounded, I leave it open, on sim, the gain falls from 20db to 4.3db, in reality it does absolutly nothing except at start up plops. This means the inputs don't receive feedbacks.
Knowing better about the gain, on sim now I can have only 10db NFB from post filter. Because feeding the input by high impedance about 600kohms, the gain of the chip alone passes from 20db to 0db. If feedback was on the input it would be 14db extra NFB.   
Talking about getting the feedback signal from differential output, is to invert one side and add to the other. I made a quick model, It looks working. 

[Kokoriantz]

Just for curiosity.
With AD modulation, the filtered output has dc component of VCC/2 and gets max from 0 to VCC. With BD modulation, see the bellow graphs, is very different. First it is 3 state and goes bellow 0 and above VCC. The difference is the output.
To feedback from post filtering, the story is more complicated in BD as re filtering causes instability.