In an STM32-based project which uses a LiPo battery, I would like to measure the raw battery voltage to get a rough indication of the remaining charge. Since the battery voltage is higher than the STM32's regulated supply, I cannot connect it directly to an analog input.
The obvious solution of using a resistive voltage divider is not great, since it will draw non-negligible standby current: The highest input impedance of the Sigma-Delta ADC input is around 1.5 MOhm (during conversion, for lowest gain and clock frequency), hence a voltage divider would need to be around 100 kOhm or lower.
What are my options here?
- A high-impedance divider with a large buffering C? (Input impedance without an active conversion is not specified, but should be very high, and I don't need to run the conversion often.)
- An op-amp buffered voltage divider? (But then standby consumption of the op-amp becomes an issue...)
- Are there battery charging ICs which provide a Vbattery/2 output for easier monitoring?
- Any other ideas?
Which approach would you prefer? Which ones are terrible ideas? Thanks for your comments!
The first one.
Filter the divided voltage with a capacitor (between the divided signal and GND); the capacitor provides low impedance for the ADC. 1µF MLCC works fine. In this configuration, only the DC leakage of the ADC and the pin (and PCB surface contamination etc.) matters, and this is negligible, probably in tens of gigaohms. You of course sacrifice bandwidth, but this isn't important for battery voltage.
Be careful not to run conversions too often, as that will discharge the capacitor faster than the resistor divider network charges it, causing a drift in values.
Ill-considered possibility....
Have a p-channel MOSFET high-side switch, as per TAoE Fig 3.96C. Only power the divider during measurements.
You might be able to increase the 10kohm and use a lower current MOSFET
You may use the suggested mosfet switch approach. I did it before with different parts.
Some STM32 parts feature an op-amp that you can configure to be the ADC input - which allows the ADC input to be buffered.
The op-amp can be disabled / powered down in software (along with the ADC ) so very little power is drawn under sleep mode
- and finally a capacitor across the bottom leg of the resistive divider.
That's what I used in the past with >1M resistors and it works well.
Thank you all -- that's very helpful input throughout!
I am reassured by Siwastaja's support for the cheap-and-cheerful buffer cap solution. I'll try that first, because I like the simplicity. (But had been concerned that I was overlooking something which might have made this approach non-viable).
If I should run into drift or noise issues, the switched lower-impedance divider is a nice fallback. Although I struggle to find and route the extra control pin; this is meant to be an update to an existing design where things are already a bit crammed.
Finally, while my STM32F373 does not seem to offer an on-chip input buffer amp, it's good to know that some STM32s have that option. I'll keep an eye out for that for future small designs which use analog I/O.
Using a voltage divider with high-resistance resistors leads to a large error because, for example, 1% of a high value gives a noticeable shift.
I once found myself in a difficult situation when I used two identical high-resistance dividers: one for the reference voltage, the second for the measured one.
It turned out that the reference voltage divider floated down, and the measured value floated in the opposite direction and turned out to be higher than the reference, although it was actually part of the reference.
Using a voltage divider with high-resistance resistors leads to a large error because, for example, 1% of a high value gives a noticeable shift.
I am not sure I get that. If we look at a symmetrical, R+R voltage divider for simplicity, a 1% deviation of one of the R values would cause a 0.5% deviation of the divider ratio -- no matter what the absolute values are. What did I miss or misunderstand?
Low power design needs attention to all details. Bias current of voltage regulators, or a leaky capacitor can wreak havoc with battery life.
Have you considere LiFePo ? It's energy density is lower, but the voltage is also lower, and you can probably directly power the circuit from the battery without a voltage regulator in between.
I have used LiFePo in another design, but in the present prefer to stick with LiPo and a regulated supply voltage. I heavily use the capacitive touch inputs on the STM32 in this project, and am weary of drifts introduced by supply changes. Not sure whether it's a justifed concern... Also, the flat pouch form factor is convenient here; that seems unavailable (or at least very uncommon?) with LiFePo cells?
My "low power" requirement is not that stringent. I use 300..700 mAh cells to have enough runtime during active use. Hence a standby current of 10 µA still gives me a few years of standby time. I don't even cut the power: The charger and voltage regulator (low quiescent current type) stay connected at all times, and I just put the STM32 and two small OLED displays into standby mode. The SH1106 displays are responsible for the bulk of the standby current draw.
Using a voltage divider with high-resistance resistors leads to a large error because, for example, 1% of a high value gives a noticeable shift.
I am not sure I get that. If we look at a symmetrical, R+R voltage divider for simplicity, a 1% deviation of one of the R values would cause a 0.5% deviation of the divider ratio -- no matter what the absolute values are. What did I miss or misunderstand?
U = Uo * R2/(R1+R2) - note: R1 is not compensated in the numerator.
Your opinion is valid for the special case of a divider by 2 with equal resistors, because U = Uo * R/2R = Uo * 1/2 = Uo / 2.
Just calculate devider 1:10 with 100k and 10k resistors floating 1% with diffrent directions.
All well and good. But the absolute value of the resistors always cancels out, right?
Whether you have a 10k/1k divider or a 10M/1M divider, the impact of a 1% error of a resistor remains the same. That's where I struggle with your original statement that "Using a voltage divider with high-resistance resistors leads to a large error".
All well and good. But the absolute value of the resistors always cancels out, right?
Whether you have a 10k/1k divider or a 10M/1M divider, the impact of a 1% error of a resistor remains the same. That's where I struggle with your original statement that "Using a voltage divider with high-resistance resistors leads to a large error".
but any leakage current is going to have a large impact
Here's another alternative for a switched divider. For a 3.3V MCU, the mosfet should be logic level.
All well and good. But the absolute value of the resistors always cancels out, right?
Whether you have a 10k/1k divider or a 10M/1M divider, the impact of a 1% error of a resistor remains the same. That's where I struggle with your original statement that "Using a voltage divider with high-resistance resistors leads to a large error".
Check by calculation
That's not helpful. A 1% error on the 10k or 1k resistor in my example will have the same effect as a 1% error on the 10M or 1M resistor in the high-resistance version.
Did you maybe mean to say "voltage dividers with high
divider ratios can lead to large errors"? That's not what you said. Check by dictionary.
Here's another alternative for a switched divider. For a 3.3V MCU, the mosfet should be logic level.
if it is acceptable that the resulting voltage is ,say, <1V you could probably swap and the fet and the top resistor and do with an nfet
Here's another alternative for a switched divider. For a 3.3V MCU, the mosfet should be logic level.
if it is acceptable that the resulting voltage is ,say, <1V you could probably swap and the fet and the top resistor and do with an nfet
Yes you could, but then you have to make sure the 1V works with the N-channel's threshold voltage, since you only have a net 2.3V maximum Vgs. With the P-channel, Vgs always goes to 3.3V.
A 1% error on the 10k or 1k resistor in my example will have the same effect as a 1% error on the 10M or 1M resistor in the high-resistance version.
Just ignore S. Petrukhin. As we all know, obviously the magnitude of resistor values used does not affect the tolerance of the divider. This is easy to verify by doing what S. Petrukhin suggested - do the calculation. Probably he did the math once and made some simple calculation error and then the wrong idea stuck.
With large values, however, expected and unexpected leakage currents play more important role. In other words, add an external (parasitic) very high value resistor in the mix, and now the absolute value of your divider starts to matter. It all boils down to accuracy requirements vs. level you can control the leakage currents. In low power designs, resistor divider impedances around 1Mohm are common, even in "precision" parts like regulator feedback dividers - or, like in your case, battery voltage measurement dividers. But for some, "high precision" means +/-1% error - that's what the typical linear regulator, or a voltage reference integrated in the MCU - introduces anyway; for others, maybe +/-0.01% is required. In latter case, both very high and low divider values come with their own set of issues.
I use the capacitor strategy with SAR ADCs all the time. People keep suggesting adding random opamps to the mix, but I simply don't see the point, when I don't need the bandwidth. Designers wanting to make themselves look irreplaceable by adding unnecessary complexity are not limited to software engineering, we do see this in hardware, too.
High value resistors, like > 1-10 M ohm tend to get a bit less accurate and leakage currents can be more of an issue. The higher accuracy thin film resistors are rarely available at more than 1 M. It depends on the required accuracy how high one should go with the divider. 10 M may be OK if 1-2 % is OK.
How about this?
The switch can be anything that works and has low leakage. When you turn the switch on, the charge equalizes between C1 and C2 (presuming C1 = C2) and you can take your reading. If R1 = R2 then the voltage will be stable there, otherwise you have to take the reading immediately. You would need to closely match C1 and C2 if you wanted great accuracy, but that's going to be an issue no matter how you do this. The advantages of this setup are that R1 can be lower, allowing more frequent readings if needed yet the leakage can be lower since that only depends on the leakage of C1 and S1. Also R1 and R2 can be reasonable values that are available in 1% tolerances. You could even make them low enough to put a small load on the battery if you wanted to.
The solution with high resistance (e.g. 1 M or maybe 10M if accuracy is not that critical) divder and capacitor is the easiest and could work most of the cases. If lower current is wanted (e.g. a rather small battery, really low power) the solution with the extra high side switch can give better performance, but with additional effort (extra control and parts).
The swich in the middle could be a way to speed up the settling, but with batteries there is usually no real need to read that fast. An OK battery should not change the voltage that fast.
The "floating switch can make the control a little more tricky, but would likely be OK for low voltage (e.g. 1 or 2 cells).
Thanks again, guys!
My accuracy requirements are not high; I just need a ballpark number where in the 3..4 V range the battery voltage currently sits. Combined with the low bandwidth/infrequent measurements needed in this application, the capacitor-buffered high impedance divider still looks like a simple and adequate solution.
If I should need to transition to a switched lower-impedance divider, the "switch in the middle" scheme suggested by langwadt and bdunham7 seems like a good way to implement this. That variant not occurred to me before, and I'll keep it in mind.