Author Topic: 40 MHz to 180 MHz PLL in less than 48 pins?  (Read 1566 times)

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Offline rs20Topic starter

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40 MHz to 180 MHz PLL in less than 48 pins?
« on: May 19, 2016, 08:47:21 am »
I've got a project that calls for a 10/20/40* MHz single-ended clock and a 180 MHz differential clock. Now because I'm the type of fool that will spend a month looking for a one-day workaround to a one-week task, I've been playing around with Analog Device's ADIsimCLK software and TI's Webench Clock Designer website. My experience has been very poor in comparison with TI's Webench Power Designer site, here are the things I am sad about:

- The suggested designs invoke vastly capable chips (example) with 1-3 GHz VCOs, multiple outputs, and all sorts of other features. Question: is it standard practice, like with microcontrollers, to use clock generator parts with vastly more capability than you require? Is it standard to stop off at 1.62 GHz on the way from 40 MHz to 180 MHz? Or are these tools hiding much simpler solutions from me?

- The simulators provide very specific simulation, even time-domain transient simulations. And yet when I look at the datasheets of the parts, I see pages and pages of configuration registers that the design tools fail to provide any clue how to set. I'm talking weird stuff beyond your normal divider and fractional registers -- stuff like antibacklash pulse width, VCO calibration registers, etc.  Now I know that I'm being lazy to an extent here, but this makes no sense: either these registers are critical to the performance of the part (in which case surely the simulator should divulge the settings that it's using in the simulation), or the registers are immaterial (in which case, why are they even there?)

I guess my question is, should I harden up and forge ahead with these super-parts? Or am I missing a far easier path here?

* By "10/20/40", I mean that I don't care whether it's 10 or 20 or 40, whatever works out best. (Ironically the PLL inside my MCU is very easy to use for taking any of 10 or 20 or 40 up to 40 MHz!)
 

Offline Ice-Tea

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Re: 40 MHz to 180 MHz PLL in less than 48 pins?
« Reply #1 on: May 19, 2016, 09:24:44 am »
Is there a relation between these clocks?

Getting a component with a fixed frequency is easy enough. Often these are factory programmed but that doesn't really matter. Example:

http://www.digikey.com/product-detail/en/maxim-integrated/DS1088LU-10-/DS1088LU-10--ND/1769369

In general: it should be possible to do this with non-programmable off the shelf parts. PLay around a bit with the digi-key product selector, don't forget to tick the "in stock" box and you should find a suitable combination...

 

Offline rs20Topic starter

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Re: 40 MHz to 180 MHz PLL in less than 48 pins?
« Reply #2 on: May 19, 2016, 09:43:17 am »
I do want the two clocks to be phase locked and of reasonable (100ppm?) accuracy.

In my mind, the most reasonable way to achieve that is to use a 10/20/40 MHz Quartz/MEMS oscillator, followed up by a PLL boosting to 180 MHz.
 

Offline rs20Topic starter

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Re: 40 MHz to 180 MHz PLL in less than 48 pins?
« Reply #3 on: May 19, 2016, 11:03:47 am »
Hmm, decided to just do a search on Digikey. Why didn't I start there?  :palm:

The FS7140 looks like a perfect choice. SSOP-16, no external loop components required, and the VCO will be running natively at 180 MHz. I'll have to figure out the internal loop filter config myself, but given that the charge pump, loop cap, and loop resistor registers have 5 bits between them, it shouldn't be too hard to try all 32 permutations as an absolute last resort!!

Any other recommendations still encouraged and appreciated.
 


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