Electronics > Projects, Designs, and Technical Stuff
Multi microcontroller communication
<< < (5/5)
servoGuy:
@max_torque: That might actually be an easy and very fast possibility. The only drawback is the number of connection pins between the slaves. Any recommendations for a connection header providing eg. 14pins  to easily connect modules?
Psi:

--- Quote from: servoGuy on December 23, 2018, 05:36:09 pm ---I thought about USART or SPI with ss always enabled. The protocol therefore would have to define some kind of identifier so the slave boards know when to respond.

--- End quote ---

Some micros have "Multi-processor Communication Mode" or similar.
Multi-processor Communication Mode is what Atmel call it on ATmega chips.

It's basically some hardware that's part of the UART module which allows you to have an address ID with multiple micros on a bus and have them all ignore data (in hardware) unless its addressed to them.

Here's what the ATMega8 datasheet says about it.
I'm pretty sure its part of their full UART module so all ATMega chips should have it.

Multi-processor Communication Mode
Setting the Multi-processor Communication mode (MPCM) bit in UCSRA enables a filtering function of incoming
frames received by the USART Receiver. Frames that do not contain address information will be ignored and not
put into the receive buffer. This effectively reduces the number of incoming frames that has to be handled by the
CPU, in a system with multiple MCUs that communicate via the same serial bus. The Transmitter is unaffected by
the MPCM setting, but has to be used differently when it is a part of a system utilizing the Multi-processor Communication
mode.
If the Receiver is set up to receive frames that contain 5 to 8 data bits, then the first stop bit indicates if the frame
contains data or address information. If the Receiver is set up for frames with nine data bits, then the ninth bit
(RXB8) is used for identifying address and data frames. When the frame type bit (the first stop or the ninth bit) is
one, the frame contains an address. When the frame type bit is zero the frame is a data frame.
The Multi-processor Communication mode enables several Slave MCUs to receive data from a Master MCU. This
is done by first decoding an address frame to find out which MCU has been addressed. If a particular Slave MCU
has been addressed, it will receive the following data frames as normal, while the other Slave MCUs will ignore the
received frames until another address frame is received.


Using MPCM
For an MCU to act as a Master MCU, it can use a 9-bit character frame format (UCSZ = 7). The ninth bit (TXB8)
must be set when an address frame (TXB8 = 1) or cleared when a data frame (TXB = 0) is being transmitted. The
Slave MCUs must in this case be set to use a 9-bit character frame format.
The following procedure should be used to exchange data in Multi-processor Communication mode:
1. All Slave MCUs are in Multi-processor Communication mode (MPCM in UCSRA is set).
2. The Master MCU sends an address frame, and all slaves receive and read this frame. In the Slave MCUs,
the RXC Flag in UCSRA will be set as normal.
3. Each Slave MCU reads the UDR Register and determines if it has been selected. If so, it clears the
MPCM bit in UCSRA, otherwise it waits for the next address byte and keeps the MPCM setting.
4. The addressed MCU will receive all data frames until a new address frame is received. The other Slave
MCUs, which still have the MPCM bit set, will ignore the data frames.
5. When the last data frame is received by the addressed MCU, the addressed MCU sets the MPCM bit and
waits for a new address frame from Master. The process then repeats from 2.
Using any of the 5- to 8-bit character frame formats is possible, but impractical since the Receiver must change
between using n and n+1 character frame formats. This makes full-duplex operation difficult since the Transmitter
and Receiver uses the same character size setting. If 5- to 8-bit character frames are used, the Transmitter must
be set to use two stop bit (USBS = 1) since the first stop bit is used for indicating the frame type.
Do not use Read-Modify-Write instructions (SBI and CBI) to set or clear the MPCM bit. The MPCM bit shares the
same I/O location as the TXC Flag and this might accidentally be cleared when using SBI or CBI instructions.
fchk:

--- Quote from: servoGuy on December 27, 2018, 10:27:03 pm ---@max_torque: That might actually be an easy and very fast possibility. The only drawback is the number of connection pins between the slaves. Any recommendations for a connection header providing eg. 14pins  to easily connect modules?

--- End quote ---

Look at PC/104:

http://suddendocs.samtec.com/catalog_english/esq_th.pdf

fchk
NorthGuy:
Plain SPI should work fine as long as the master can drive the bus with 10 slaves, which may be Ok with relatively short distances at 10MHz. You can provide a single CS line for synchronization, then start every transmissions with an address of the slave you want to talk to. If the slave recognizes the address, it turns on its MISO line, or keep it tri-stated otherwise. This scheme also lets you have different slaves working at different speeds.
zenman:
Have you considered using the ESP32 and transfer all the data wirelessly? This guy measured 13 Mbits/sec when using multiple threads: http://iot-bits.com/esp8266-tcp-server-speed-test/
Navigation
Message Index
Previous page
There was an error while thanking
Thanking...

Go to full version
Powered by SMFPacks Advanced Attachments Uploader Mod