Author Topic: multiple gnd pins  (Read 5421 times)

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Offline electros6Topic starter

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multiple gnd pins
« on: November 17, 2013, 04:40:49 pm »
what is the need of multiple gnd pins in an IC's if all of them connected together internally
 

Offline SeanB

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Re: multiple gnd pins
« Reply #1 on: November 17, 2013, 04:51:03 pm »
Reduces inductance of the ground connection to the die. Often the internal grounds are not connected internally so as to provide signal isolation to reduce noise and transients from switching high pulse currents from affecting other parts. On your i7 processor nearly half the pins are allocated to either power or ground to handle the 100 plus amps the processor die can draw at 3GHz plus clock speeds.
 

alm

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Re: multiple gnd pins
« Reply #2 on: November 17, 2013, 05:09:44 pm »
Look up 'ground bounce'.
 

Offline minime72706

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Re: multiple gnd pins
« Reply #3 on: November 17, 2013, 05:36:55 pm »
Usually either multiple grounds are present (though they may be tied at one single point at the die) or a high-current/high-speed device needs the lowest conductor inductance and resistance that it can get. If you push too much current through ground connections, the "ground" near the center of the die will 'lift', reducing the effective voltage those circuits run at. This is a real pain in the ass on any advanced (speed) IC that consumes a lot of power. 1.2V at the pad ring may easily be 0.9V at the center of the die on a lot of kinds of ICs.
I have more incomplete projects than I have digits and toes.
 

Offline Electro Fan

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Re: multiple gnd pins
« Reply #4 on: November 17, 2013, 05:44:21 pm »
Reduces inductance of the ground connection to the die. Often the internal grounds are not connected internally so as to provide signal isolation to reduce noise and transients from switching high pulse currents from affecting other parts. On your i7 processor nearly half the pins are allocated to either power or ground to handle the 100 plus amps the processor die can draw at 3GHz plus clock speeds.

100 amps seems like a lot?


The Intel® Core™ i7 Processor requires a minimum of 8 Amps continuous and 13 Amps peak for 10ms on 12V2.
http://www.intel.com/support/processors/corei7/sb/CS-030866.htm
 

Online Monkeh

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Re: multiple gnd pins
« Reply #5 on: November 17, 2013, 05:47:10 pm »
Reduces inductance of the ground connection to the die. Often the internal grounds are not connected internally so as to provide signal isolation to reduce noise and transients from switching high pulse currents from affecting other parts. On your i7 processor nearly half the pins are allocated to either power or ground to handle the 100 plus amps the processor die can draw at 3GHz plus clock speeds.

100 amps seems like a lot?


The Intel® Core™ i7 Processor requires a minimum of 8 Amps continuous and 13 Amps peak for 10ms on 12V2.
http://www.intel.com/support/processors/corei7/sb/CS-030866.htm

That's on 12V. The core does not operate on 12V.
 

Offline Rufus

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Re: multiple gnd pins
« Reply #6 on: November 17, 2013, 06:19:27 pm »
 

Offline minime72706

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Re: multiple gnd pins
« Reply #7 on: November 17, 2013, 06:22:27 pm »
12V would be converted to Vcore (around 1V these days) with probably 80% efficiency. Most systems would pull close to or over 100A under full load.
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Offline echen1024

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Re: multiple gnd pins
« Reply #8 on: November 17, 2013, 10:11:13 pm »
I'm not saying we should kill all stupid people. I'm just saying that we should remove all product safety labels and let natural selection do its work.

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Offline Carrington

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Re: multiple gnd pins
« Reply #9 on: November 17, 2013, 11:42:19 pm »
Multiple gnd pins and multiple VDD pins. Why? Ground bounce and/or reduces inductance.





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« Last Edit: November 17, 2013, 11:47:19 pm by Carrington »
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Offline Electro Fan

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Re: multiple gnd pins
« Reply #10 on: November 18, 2013, 03:29:16 am »
100 amps seems like a lot?

Ok, looks like the math works:  1.28 volts x 120.49 amps = 154.23 watts
Thanks for the info in the graphic :-+
« Last Edit: November 18, 2013, 03:33:25 am by Electro Fan »
 

Offline Rufus

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Re: multiple gnd pins
« Reply #11 on: November 18, 2013, 03:46:38 am »
What program is that?

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Offline george graves

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Re: multiple gnd pins
« Reply #12 on: November 18, 2013, 04:33:12 am »
I thought I read that some times the multiple grounds are use for heat sinking, and that although they are all connected, you should still solder them to help heat transfer away from the chip.  This was on a SOIC chip.

Offline daqq

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Re: multiple gnd pins
« Reply #13 on: November 18, 2013, 06:58:11 am »
Quote
I thought I read that some times the multiple grounds are use for heat sinking, and that although they are all connected, you should still solder them to help heat transfer away from the chip.  This was on a SOIC chip.
This is true - for instance the A3967 (Allegro stepper driver) has this in the datasheet:
Quote
The 24-lead SOIC has the analog ground and the power ground internally bonded to the power tabs of the package (leads 6, 7, 18, and 19).
These pins are pretty much in the middle and when placed on a properly designed board the board acts as a heatsink. But it is chip dependent - only the ICs that need this have this - the others make good use of extra pins. As for soldering - unless prototyping (and having a very good reason no to), you should solder and connect everything that is meant to be soldered.
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Offline quantumvolt

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Re: multiple gnd pins
« Reply #14 on: November 18, 2013, 07:25:37 pm »
Interesting and eye opening - 100 A on a die.

I used to sloppy-does-it a few thin ground wires on all my stuff (unless it was a linear power supply or -amplifier). But after spending days debugging supposed-to-be super stable precision circuitry where you could use one of the reference ground pins as a square wave generator - no more.

I now keep these pictures in my head. The two first reminds me of impedance - off chip as well as on chip. The third is the most important: When you have 3 (or in some cases 4-5-6) different ground buses there is a reason. So it is probably smart to reflect on what the reason is ...

PCB-Wire level impedance


Chip GND paralleling


VIP.img

Sometimes you are not supposed to slap multiple GND pins together "on" the chip. If you were - why did they bother to separate and name them?
 


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