Author Topic: My PSU design ripple and noise with picture measurements  (Read 41080 times)

0 Members and 1 Guest are viewing this topic.

Offline VEGETATopic starter

  • Super Contributor
  • ***
  • Posts: 1992
  • Country: jo
  • I am the cult of personality
    • Thundertronics
My PSU design ripple and noise with picture measurements
« on: August 22, 2021, 06:55:55 pm »
Hello

I designed a PSU as a replacement PSU for Dreamcast using TPS62913 which promises total final noise and ripple of 1 mV p-p but I got around 80-100mV p-p despite following the datasheet and design layout recommendation. Other third-party PSU delivered near identical results despite having inferior parts and basic design. I added LC filters and ferrites plus bulk filtering caps 1000uF with 22uF ceramics for the input 12v rail but still I got this result.

Input 12v is supposed to come from cheap 12v PSUs, mine has 250mV p-p ripple and noise as shown in below pictures...

so:

1- does this mean that even good buck regulator design just cannot eliminate input ripple\noise? I mean it will get reduced but still will pass through?

2- what solution to achieve such low figure of 1mV or near it?

3- is adding huge inductor Pi filter will solve it? I only had 4.7uH for 12v filtering plus 1000UF elec cap and many ceramics.


pictures are labelled so you can recognize it.

for your kind help.

regards,

Offline ezalys

  • Frequent Contributor
  • **
  • Posts: 322
  • Country: us
Re: My PSU design ripple and noise with picture measurements
« Reply #1 on: August 22, 2021, 07:04:27 pm »
we’d need to see your schematic and layout. Also what’s the signal on the scope look like if you do the exact same measurement but with the power supply turned off?
 

Offline ezalys

  • Frequent Contributor
  • **
  • Posts: 322
  • Country: us
Re: My PSU design ripple and noise with picture measurements
« Reply #2 on: August 22, 2021, 07:08:39 pm »
additionally, I think it’s bad engineering to just throw LC filters at the thing. I’d like to know what the cutoffs are of the filters, the parasitics of them, the layout, all these things will contribute. It’s also true that no regulator will eliminate all noise, they just suppress it with a particular amount of suppression per frequency. LC filters, bulk caps, ferrites, and regulators themselves are tools in your toolbox to be applied deliberately to reduce noise.
 

Offline floobydust

  • Super Contributor
  • ***
  • Posts: 7219
  • Country: ca
Re: My PSU design ripple and noise with picture measurements
« Reply #3 on: August 22, 2021, 07:14:08 pm »
Who promised 1mV p-p ripple out of a buck converter? Oh TI did TPS6291x 3-V to 17-V, 2-A/3-A Low Noise and Low Ripple Buck Converter with Integrated Ferrite Bead Filter Compensation using 8A ferrite bead BLE18PS080SN1.
I think your expectations are high and a Dreamcast doesn't require such low ripple.

Your PCB layout, scope grounding, choice of capacitors, ferrite bead- are all critical. You've got a 50mV noise floor so you cannot measure below that anyhow.
 

Offline VEGETATopic starter

  • Super Contributor
  • ***
  • Posts: 1992
  • Country: jo
  • I am the cult of personality
    • Thundertronics
Re: My PSU design ripple and noise with picture measurements
« Reply #4 on: August 23, 2021, 09:06:33 am »
additionally, I think it’s bad engineering to just throw LC filters at the thing. I’d like to know what the cutoffs are of the filters, the parasitics of them, the layout, all these things will contribute. It’s also true that no regulator will eliminate all noise, they just suppress it with a particular amount of suppression per frequency. LC filters, bulk caps, ferrites, and regulators themselves are tools in your toolbox to be applied deliberately to reduce noise.

I didn't do calculations for LC filters but rather kept it straightforward and simple. I knew 12v will be very noisy, so I put them. I will put schematic once I return from work, even though it is not open source and should be commercial product... but it is ok.

Quote
Who promised 1mV p-p ripple out of a buck converter? Oh TI did TPS6291x 3-V to 17-V, 2-A/3-A Low Noise and Low Ripple Buck Converter with Integrated Ferrite Bead Filter Compensation using 8A ferrite bead BLE18PS080SN1.

Yes, this is the IC. I have used different passives (from LCSC) than those of TI, but I think the ferrite is the same. why the results differ so much?

Quote
I think your expectations are high and a Dreamcast doesn't require such low ripple.

I kinda went with their data and demonstration, or else what extra benefit to get from this IC over a regular one?

Dreamcast is an old console which uses analog video signals which are sensitive to noise. analog video is 1v only, so 100mV ripple and noise will have an effect. Generally, less noise and ripple the better. Making a cheap PSU which has low noise\ripple is good too.


Quote
Your PCB layout, scope grounding, choice of capacitors, ferrite bead- are all critical. You've got a 50mV noise floor so you cannot measure below that anyhow.

Scope is not mine, it is in a fablab which is far away from me. Not accessible easily due to far distance and so on. It is gw instek gds-1152a-u 150 MHz 2 channels. I used normal probe with putting the probe ground to psu ground and then get the signal. I wonder why I got such a huge noise floor.

If I got 60-90mV noise for it, does that mean its real noise\ripple is just 10-40 mV p-p since the extra 50mV is just noise floor?


what solutions do you suggest to achieve this low values or near them?

Offline VEGETATopic starter

  • Super Contributor
  • ***
  • Posts: 1992
  • Country: jo
  • I am the cult of personality
    • Thundertronics
Re: My PSU design ripple and noise with picture measurements
« Reply #5 on: August 23, 2021, 07:26:56 pm »
Here is the schematic and layout.

Online T3sl4co1l

  • Super Contributor
  • ***
  • Posts: 22001
  • Country: us
  • Expert, Analog Electronics, PCB Layout, EMC
    • Seven Transistor Labs
Re: My PSU design ripple and noise with picture measurements
« Reply #6 on: August 23, 2021, 08:02:56 pm »
Why isn't ground poured under everything?  Most especially the regulators themselves, but also contiguously under the board?  Likely the ripple measurement is largely common mode (due to the high ground impedance between connectors)..?

C6-C8, C10 and C12 do absolutely nothing; I don't know where such tiny values came from.  The ferrite beads largely do nothing as well, they saturate under bias (typically >50mA, depends on value and size -- they may still be seen to help out at light loads).

Bleeder/load resistors should not be necessary.  If you are finding instability, check component values, or select a regulator with external compensation so it can be better tuned.

Note that such large ceramics (22uF, in, what are these, 0805s?) run out of capacitance quickly under DC bias, not so much at 3.3V, a bit at 5V, definitely at 12V.  This is probably still fine because of the parallel quantities, but keep this in mind when going from design calculations to component selection.

Since you're using electrolytics (well, polarized something anyway, maybe they're polymer I don't know), I don't get the large quantities of 22uF chips; a couple electrolytics would do as good a job, plus one or two ceramics to "take the edge off".  Otherwise, if you're not squeamish about the cost of so many caps, why not just go all in, who needs electrolytic?  (Except maybe at the input, if there's a need for bulk capacitance say for mains filtering or hold-up time.)

The 3.3 and 5V outputs seem reasonably well filtered near the connector, but V12 is not at all.  But the input is heavily filtered (but only differential mode).

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline GigaJoe

  • Frequent Contributor
  • **
  • Posts: 505
  • Country: ca
Re: My PSU design ripple and noise with picture measurements
« Reply #7 on: August 23, 2021, 10:00:51 pm »
chip operated at 1-2Mhz,  radio frequency , extremely short connections,  filled ground, dual side for ground, shielding, etc
pdf define a spec even for caps, due to freq. and resistance.

proper scope measurement, your scope tail catch everything , something like that
https://www.cui.com/blog/how-to-measure-ripple-and-transient-in-power-supplies

huge caps or L doesn't help much due to freq.  find caps - freq. dependence graph.


 

Offline VEGETATopic starter

  • Super Contributor
  • ***
  • Posts: 1992
  • Country: jo
  • I am the cult of personality
    • Thundertronics
Re: My PSU design ripple and noise with picture measurements
« Reply #8 on: August 24, 2021, 09:36:28 am »
Quote
Why isn't ground poured under everything?  Most especially the regulators themselves, but also contiguously under the board?  Likely the ripple measurement is largely common mode (due to the high ground impedance between connectors)..?

I followed datasheet layout recommendation for ground pour. I also thought it would be a good idea to make noisy 12v ground far from clean regulated output ground due to what many people are assuming about separating ground for return current path and not mixing bad noisy signals with clean ones. On a side note, I am changing my idea towards making one unified ground pour for everything these days as some credible people are saying this nowadays.

Quote
C6-C8, C10 and C12 do absolutely nothing; I don't know where such tiny values came from.  The ferrite beads largely do nothing as well, they saturate under bias (typically >50mA, depends on value and size -- they may still be seen to help out at light loads).

I added them as an extra caps to deal with high frequency stuff. I also put Pi filters as you see but they don't seem to have done much. I didn't do any calculations though.

Quote
Bleeder/load resistors should not be necessary.  If you are finding instability, check component values, or select a regulator with external compensation so it can be better tuned.

Adding minimal load like this is always best and doesn't cost a thing. no harm too.

Quote
Note that such large ceramics (22uF, in, what are these, 0805s?) run out of capacitance quickly under DC bias, not so much at 3.3V, a bit at 5V, definitely at 12V.  This is probably still fine because of the parallel quantities, but keep this in mind when going from design calculations to component selection.

0805 is the largest I can tolerate since it is 50x50mm board. Putting many in parallel is also helpful as you said.

Quote
Since you're using electrolytics (well, polarized something anyway, maybe they're polymer I don't know), I don't get the large quantities of 22uF chips; a couple electrolytics would do as good a job, plus one or two ceramics to "take the edge off".  Otherwise, if you're not squeamish about the cost of so many caps, why not just go all in, who needs electrolytic?  (Except maybe at the input, if there's a need for bulk capacitance say for mains filtering or hold-up time.)

regulator IC doesn't require elec. caps and actually does not require a lot of capacitance at the output. In fact, there is a limit to how much I should put. recommendation suggests these 22uF caps at the output but I also added 47uF elec. caps to have extra bulk capacitance since it is well within the upper limit.

Quote
The 3.3 and 5V outputs seem reasonably well filtered near the connector, but V12 is not at all.  But the input is heavily filtered (but only differential mode).

kindly explain differential mode filtering you mentioned.

12v input is itself the 12v rail. it is heavily filtered but unfortunately doesn't seem to have done what I hoped. the third party PSU has 33uH inductors with 100uF elec.caps output filters after regulators... it gets nearly the same result.

do you mean I must put big caps near the 12v output connector pin itself? but the signal is very well filtered before and the trace is thick and not too long to cause all this.

Do you find it applicable to remove all that 200-260mV p-p ripple and noise from the 12v input? especially for 3.3v and 5v rails (and 12v one as well).

Should I go for 33uH or similar very big inductance with elec. caps to filter the 12v? since my inductors are very small.

I say this assuming that if the buck regulators are fed with very clean 12v signal, they won't add ripple and noise to it as they claim since we concluded that the input ripple and noise will be suppressed but still get in if not filtered.



___

Quote
chip operated at 1-2Mhz,  radio frequency , extremely short connections,  filled ground, dual side for ground, shielding, etc

I did make connections short, could be shorter too. You mean I have to make top and bottom layers as ground fills?

Quote
pdf define a spec even for caps, due to freq. and resistance.

passives are all cheap from LCSC, didn't get low ESR or so but rather suitable footprint and voltage.

Quote
huge caps or L doesn't help much due to freq.  find caps - freq. dependence graph.

Input frequency is not high, so I assume big caps cap be good right? what about putting higher amount of inductors like 220~470uH as LC input filters, multistages?

how can I get the low noise\ripple factor that I require?


Offline VEGETATopic starter

  • Super Contributor
  • ***
  • Posts: 1992
  • Country: jo
  • I am the cult of personality
    • Thundertronics
Re: My PSU design ripple and noise with picture measurements
« Reply #9 on: August 25, 2021, 10:23:13 pm »
If anyone interested or can properly measure the ripple and noise of my small board, I can send it to him. Please advise.

Offline VEGETATopic starter

  • Super Contributor
  • ***
  • Posts: 1992
  • Country: jo
  • I am the cult of personality
    • Thundertronics
Re: My PSU design ripple and noise with picture measurements
« Reply #10 on: August 26, 2021, 01:00:07 pm »
Why isn't ground poured under everything?  Most especially the regulators themselves, but also contiguously under the board?  Likely the ripple measurement is largely common mode (due to the high ground impedance between connectors)..?

C6-C8, C10 and C12 do absolutely nothing; I don't know where such tiny values came from.  The ferrite beads largely do nothing as well, they saturate under bias (typically >50mA, depends on value and size -- they may still be seen to help out at light loads).

Bleeder/load resistors should not be necessary.  If you are finding instability, check component values, or select a regulator with external compensation so it can be better tuned.

Note that such large ceramics (22uF, in, what are these, 0805s?) run out of capacitance quickly under DC bias, not so much at 3.3V, a bit at 5V, definitely at 12V.  This is probably still fine because of the parallel quantities, but keep this in mind when going from design calculations to component selection.

Since you're using electrolytics (well, polarized something anyway, maybe they're polymer I don't know), I don't get the large quantities of 22uF chips; a couple electrolytics would do as good a job, plus one or two ceramics to "take the edge off".  Otherwise, if you're not squeamish about the cost of so many caps, why not just go all in, who needs electrolytic?  (Except maybe at the input, if there's a need for bulk capacitance say for mains filtering or hold-up time.)

The 3.3 and 5V outputs seem reasonably well filtered near the connector, but V12 is not at all.  But the input is heavily filtered (but only differential mode).

Tim

I thought of your words and guessed that maybe be a simpler approach is better.

Using this 100uH inductor: https://www.digikey.com/en/products/detail/pulse-electronics-power/PA4309-104NLT/5361574 (or cheaper from LCSC).

preceded and followed by 1000uF caps parallel to ground, which acts as 3rd order LC filter.

This would be the only filtration for 12v input rail, then I feed this into the switchers and remove the useless small value ceramic caps and only keep the 22uF ones in both input and output. While also keeping 47uF elec. caps for outputs and add one elec. 47uF + 22uF ceramic + Ferrite bead just before the 12v connector itself.

What do you think?

I could add another stage of 100uH inductor which will take more space and require more 1000uF caps... if it is necessary, but this way I will need to use cheap LCSC inductors instead of that expensive Pulse-electronics one.

I wonder about those designs where people put various ceramic caps values in parallel, especially at output. like 22u, 1u, 100n, 1n... does this really enhance HF noise suppression?

Using this scope at the fablab would be problematic due to the horrible noise floor (tested by shorting the probe to GND pins) of 50mV. Should I use CH1 to get power (3.3v, 5v, 12v) and CH2 for probing GND, then do subtraction in scope software? shouldn't this eliminate the noise floor?

I think I cannot go to market with this design if it is just slightly better than the best one available, I wanted it to be a lot better.

Online T3sl4co1l

  • Super Contributor
  • ***
  • Posts: 22001
  • Country: us
  • Expert, Analog Electronics, PCB Layout, EMC
    • Seven Transistor Labs
Re: My PSU design ripple and noise with picture measurements
« Reply #11 on: August 26, 2021, 02:01:34 pm »
Do you know how much filtering you actually need?

100uH is pretty large.  Certainly large enough you need to account for its impedance, so as not to make the supplies "bouncy".  Too high of an impedance into a switching regulator, at a low frequency, and you get an oscillator -- the regulator input is negative resistance (it doesn't need to draw as much current, at higher voltage, since it conserves power).

Note that a supply isn't just, you stick a filter on it and it's done.  Filtering is with respect to a given connection.  If the input isn't noisy, you might simply wire the 12V input to the output connector and that's that.  The regulators are a pretty obvious source of noise, so it makes sense to add a filter between regulator input, and power input or output.  This is why I noted the 12V output is unfiltered: it carries full regulator ripple to the output.


<snip>
This would be the only filtration for 12v input rail, then I feed this into the switchers and remove the useless small value ceramic caps and only keep the 22uF ones in both input and output. While also keeping 47uF elec. caps for outputs and add one elec. 47uF + 22uF ceramic + Ferrite bead just before the 12v connector itself.

What do you think?

Yes, that sounds fine, or at least more reasonable; exact values still matter so it depends, but that should be in the right ballpark.

Again, ferrite beads amount to nothing; it's strange that they're even shown in the regulator datasheet at all, but it's also amusing that they label it as "10nH", i.e., as good as an equivalent length of wire (well, a cm or so).

If you know you need some actual output filtering, more like 0.1 to 2.2uH is probably reasonable, plus enough capacitance to get Zo low enough for required load step response, and well damped so it doesn't oscillate.

Zo = sqrt(L/C) is the characteristic impedance of an LC circuit.  When Zo ~ R, the network is well damped.  (Whether it's greater or lesser by a modest factor (say 1-2x), depends on how it's arranged.)  Zo gives the step response, as a load step change of say 1A is expected to develop Zo*1A peak voltage change.  If your output is say 3.3V 1A, and regulation must be within 5% including transients, then peak voltage must be under 0.165V for a full load step or 1A change, so Zo < 0.165Ω.

For 1uH and Zo < 0.165Ω, C > 36.7uF.  This can be, for example, a 22uF ceramic in parallel with 47-100uF electrolytic, selected for ESR ~ 0.15Ω.  Or the equivalent constructed from parallel ceramics and an explicit resistor.

Or if using just ceramics, since ESR ~ 10mΩ on those, you need Zo similarly low, say L around... 10nH?  Well, I suppose that explains where that number came from.  Note that 10nH and 22uF has a cutoff of 340kHz so will not attenuate much more than the sheer bulk capacitance is already doing.  Which makes sense, the caps themselves have 2-3nH ESL so a 10nH in series between a few of them doesn't really mean anything, it's a pretty weak impedance divider, hardly a filter at all.

Quote
I wonder about those designs where people put various ceramic caps values in parallel, especially at output. like 22u, 1u, 100n, 1n... does this really enhance HF noise suppression?

At best, it's an outdated practice.

The ESL of a chip capacitor is essentially its package size.  Period.  It hardly depends on value, it doesn't depend on voltage, it depends a bit on height, and most of all it depends on the length and aspect ratio.  (Which is why wide-body components are recommended for critical applications.)

The frequency of minimum impedance (series resonance) does depend on value, but the asymptote extending above there, is the same impedance -- the same ESL -- regardless of value.

So you get as good performance, beyond say 10MHz, with 0.33uF as with 33uF or anything inbetween.

Putting smaller caps in parallel, is likely to make things worse, due to the resonant loop formed between the smaller cap, its capacitance, and the larger cap.  Such loops are on the order of 6nH, so for say a 10nF, you get Zo = 0.77Ω and Fo = 20MHz.  The 10nF might have 100mΩ ESR, giving a Q of 7, or an impedance peak (parallel resonant equivalent, Zpeak = Zo * Q) of 5.4 ohms -- massively worse than the impedance of the bulk cap's inductance alone (which if it's 3nH, is only 0.377Ω at 20MHz).

And for switching regulators, it's not likely to do much of anything at all, anyway: the impedance is so much lower than for an individual logic IC for example.  Say the peak voltage and current are 12V 2A, then the impedance needs to be much less than their ratio, or 6Ω.  A small cap like 10nF just disappears, it does nothing, the input ESL dominates.  Much better to put the bulk cap there, or at least a big enough bypass (typically 1uF) to dominate over the ESL to the next bigger cap (while again being chosen for ESR to dampen that loop!).

So a 1uF at each regulator, and one or a few 22uF nearby, is likely fine for your purposes.  Plus whatever input filtering is needed, again dimensioned so that Zo is low enough, and with ESR provided to dampen it.


Quote
Using this scope at the fablab would be problematic due to the horrible noise floor (tested by shorting the probe to GND pins) of 50mV. Should I use CH1 to get power (3.3v, 5v, 12v) and CH2 for probing GND, then do subtraction in scope software? shouldn't this eliminate the noise floor?

I think I cannot go to market with this design if it is just slightly better than the best one available, I wanted it to be a lot better.

What?  You mean the scope, probe disconnected, has a noise floor that high?  It sounds defective.

If you mean with the probe tip grounded to its clip, and this point connected to circuit ground, then that is probably typical of your circuit's common mode noise, and this is dropped across the narrow, lengthy ground return path around the regulators.  And will likewise be emitted from the power cable, failing EMC.

They don't show the bottom layer in the datasheet layout example, but one should assume it's ground pour.  They do show vias for this purpose.  Strangely, they also show vias for VIN and VOUT, which have no business running on the bottom layer.  It's not clear what they mean by that.  Examples must always be taken as just that, examples; sometimes they're reasonable, sometimes they're cooked up by some random intern, who knows.

Another tip: avoid VIN and VOUT on opposite sides of the board -- this guarantees that, the full voltage drop across circuit ground, appears between connectors.  Instead, place them adjacent where possible, and route the connections over to the regulators, off to the other side.  This confines ground-loop currents to the regulator area.  Routing VIN and VOUT away from that critical area, they can be filtered with respect to a more stable GND, with less voltage drop between their respective GND connections (namely, the filter cap GNDs).

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline VEGETATopic starter

  • Super Contributor
  • ***
  • Posts: 1992
  • Country: jo
  • I am the cult of personality
    • Thundertronics
Re: My PSU design ripple and noise with picture measurements
« Reply #12 on: August 26, 2021, 07:05:53 pm »
Quote
Do you know how much filtering you actually need?

I don't know exactly but I know it needs good amount of it, switching regulator wall PSUs used are noisy.

Quote
100uH is pretty large.

I know but it seems enough to eliminate all that. most of these PSU used and to be used are in the low frequency range, certainly less than 1 MHz. Please refer to previously shown images to see input and output waveforms on the scope.

Quote
Again, ferrite beads amount to nothing; it's strange that they're even shown in the regulator datasheet at all, but it's also amusing that they label it as "10nH", i.e., as good as an equivalent length of wire (well, a cm or so).

their idea is that ferrite bead is integrated within the feedback loop itself, which is their new solution to achieve very low noise figure as shown in their datasheet and videos. it is not just an output filter.

Quote
Zo = sqrt(L/C) is the characteristic impedance of an LC circuit.  When Zo ~ R, the network is well damped.  (Whether it's greater or lesser by a modest factor (say 1-2x), depends on how it's arranged.)  Zo gives the step response, as a load step change of say 1A is expected to develop Zo*1A peak voltage change.  If your output is say 3.3V 1A, and regulation must be within 5% including transients, then peak voltage must be under 0.165V for a full load step or 1A change, so Zo < 0.165Ω.


Assuming 100uH + 1000uF, Zo = 0.316 according to equation and this site: http://circuitcalculator.com/lcfilter.htm ... this is without 1000uF before the inductor, only after it. So it is 1 inductor and 1 capacitor solution.

3.3v will be 2.8~3A full load while 5v is only 0.5A (could go a bit more). 12v is not really used for anything but GD drive motor if it is still installed, so very little current.

I didn't quite understand load step requirement you posted, kindly inform me.

The system is 22 Watts, I assume 25W PSU. 12v will be 2~2.5A, 3A at beyond max. so 12/2 = 6 Ohms or 12/3 = 4 Ohms. Z = 100uH/1000uF = 0.32 Ohms. This is for 12v input only, which is both input to the 2 regulator rails and an output of 12v for the system.

the regulators, say the 3.3v one is said to be 3 amps. 3A * 5% = 0.15v , now 0.15V/3A = 0.05R. Is this what you meant back then? Now this has nothing to do with 12v heavy filtering I talked about... please notice that the switching regulators circuit will not change by much if any... I was talking about 100uH 1000uF for the 12v input filtering only.

I already pointed out that TI specified a number of total output capacitance limit, and I adhere to it. putting 3x22uF ceramics + 1 47uF elec. seems good enough. having 3x22uF ceramics as input filtering for the regulators (fed from the heavy filtered 12v) is also suitable to datasheet.

Our whole point here is that the input noise and ripple is passing through to the output 3.3v and 5v despite using great quality switcher. therefore, the conclusion was that the switcher needs clean input to be able to provide its clean output... therefore, we will clean the 12v using heavy filtering.

Quote
The ESL of a chip capacitor is essentially its package size.

Ok, so using 22uF 0805 seems good enough.

Quote
If you mean with the probe tip grounded to its clip, and this point connected to circuit ground, then that is probably typical of your circuit's common mode noise, and this is dropped across the narrow, lengthy ground return path around the regulators.  And will likewise be emitted from the power cable, failing EMC.

Yes, probe is connected to ground and shows 50mV p-p. It is not just my own circuit but the third-party PSU as well. this PSU uses 33uH + 100UF filtering for both rails output but of course using a traditional cheap and available generic switcher.

Offline ezalys

  • Frequent Contributor
  • **
  • Posts: 322
  • Country: us
Re: My PSU design ripple and noise with picture measurements
« Reply #13 on: August 29, 2021, 11:23:53 pm »
"The ferrite beads largely do nothing as well, they saturate under bias (typically >50mA, depends on value and size -- they may still be seen to help out at light loads)."

"Again, ferrite beads amount to nothing; it's strange that they're even shown in the regulator datasheet at all, but it's also amusing that they label it as "10nH", i.e., as good as an equivalent length of wire (well, a cm or so)."

I don't get this statement at all. The wurth 74279221100 mentioned in the datasheet takes a LOT of current to saturate.

https://www.mouser.com/datasheet/2/445/74279221100-1720641.pdf

Still 10 ohms at 100 MHz at 5 amps.
 

Online T3sl4co1l

  • Super Contributor
  • ***
  • Posts: 22001
  • Country: us
  • Expert, Analog Electronics, PCB Layout, EMC
    • Seven Transistor Labs
Re: My PSU design ripple and noise with picture measurements
« Reply #14 on: August 30, 2021, 01:15:15 am »
No, I didn't look at the exact part.

Indeed that one handles quite a lot of current; and they actually provide curves -- a welcome sight!

In fact they show closer to 14nH, an absolute bounty in there! :-DD :-DD


OP didn't write down a part number or provide BOM so it's not clear if they're using same.

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline VEGETATopic starter

  • Super Contributor
  • ***
  • Posts: 1992
  • Country: jo
  • I am the cult of personality
    • Thundertronics
Re: My PSU design ripple and noise with picture measurements
« Reply #15 on: August 30, 2021, 08:45:44 am »
No, I didn't look at the exact part.

Indeed that one handles quite a lot of current; and they actually provide curves -- a welcome sight!

In fact they show closer to 14nH, an absolute bounty in there! :-DD :-DD


OP didn't write down a part number or provide BOM so it's not clear if they're using same.

Tim

I have used this one: https://www.murata.com/en-global/products/productdetail?partno=BLE18PS080SN1%23

which is recommended in the datasheet of TI.

Key BOM items:

4.7uH inductors: https://lcsc.com/product-detail/Inductors-SMD_PSA-Prosperity-Dielectrics-MCS0630-4R7MN2_C385253.html ...

although in my previously made units I used PA4340.472NLT which was similar to recommended ones (XGL4030-472). I assumed that getting a cheap one will work and it did, but not sure its effect on noise performance. I plan to test my previously made units on the scope this time. Their only issue was a slightly more increased voltage on 5v, around 5.2v which made me change the values then I took the chance to add more filters..etc

22uF ceramic caps: https://lcsc.com/product-detail/Multilayer-Ceramic-Capacitors-MLCC-SMD-SMT_SAMSUNG_CL21A226MAQNNNE_22uF-226-20-25V_C45783.html

1uH inductor: https://lcsc.com/product-detail/New-Quadratic-Unclassified-Data_GLE-GCDA252012P-1R0MC_C439318.html

1000uF elec. cap: https://lcsc.com/product-detail/Aluminum-Electrolytic-Capacitors-SMD_Lelon-VE-102M1CTR-1010_C249474.html


____

What can be done to enhance the performance?

Anyone can kindly volunteer to test the 2 units (new and old)? I can send it via mail since I don't have a scope now and it will be very hard to do measurements.

My current thought is to have a 2-stage LC filter of say 100uH+1000uF in each stage... or 47uH+1000\2200uF or similar... for the 12v input, then for 12v output connector itself I can put another 1000uF cap.

I am not fond of the idea to replace the 22uF ceramics by elec. caps. datasheet wants ceramics especially for output which I added a 47uF elec. cap as an added filtration.

___

TPS62913 stated > 65 dB PSRR for <100 Khz which I didn't take into account. So assuming 200mV p-p actual noise and ripple (after taking off 50mV noise floor), I got 10-40mV final output (after taking off 50mV noise floor)... is that what this 65 db PSRR suggests?

Online T3sl4co1l

  • Super Contributor
  • ***
  • Posts: 22001
  • Country: us
  • Expert, Analog Electronics, PCB Layout, EMC
    • Seven Transistor Labs
Re: My PSU design ripple and noise with picture measurements
« Reply #16 on: August 30, 2021, 05:23:53 pm »
Those components seem fine.

The ferrite bead does not provide DC bias characteristic (Murata doesn't record it for any ferrite beads at all, I'm pretty sure) but given the other part above, it's probably fine around an ampere or so.  And, again given the value, it's doing very little in any case.

The 22u caps don't have a char sheet, at least that I saw from a glance.  Huh, they're also listed as obsolete at other suppliers, I wonder where LCSC is getting them......

Note that both (cored) inductors, and type 2 ceramic caps, lose value under bias (current and voltage respectively).  You get a 22uF cap at 0V; at 12V it's probably like 3uF or so.  Still enough to be useful, but keep this in mind when designing filters, and prefer parts with actual characteristics.

X5R is also a bit on the low side, but it shouldn't be too much worse in terms of voltage dependency or tempco compared to X7R or better, as long as you aren't operating at high temperatures (the 5 means 85°C max, 7 is 125).  Note that temp rise (power dissipated in ESR) can be relevant for caps handling high ripple currents -- probably not here, but can be important for bigger converters (100s watts?).

PSRR is Power Supply Rejection Ratio.  That is, how much does the output voltage change, for a given change in input voltage.  For example, suppose a buck converter operates at a fixed PWM: Vo = Vin * D (D = duty cycle).  In this case, PSRR = -20 * log(D), because say 1V changes at the input, and D is 0.5, then the output changes by 0.5V and the PSRR is 6dB.  And this will be true for frequencies from DC up to the cutoff frequency of the input and output filters, where filter attenuation dominates (and thus PSRR goes up: PSRR = filter attenuation - converter gain).  It's improved still further by the control circuit, varying D to maintain Vo.  This gives high PSRR at DC, up to the error amp's cutoff frequency more or less; at which point the filters should take over.  And with >65dB PSRR overall, it sounds like this is the case for their design.  Put another way, the output is disturbed by less than one-thousandth the input change (20 log(1000) ~= 60dB), a generally excellent figure.

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline VEGETATopic starter

  • Super Contributor
  • ***
  • Posts: 1992
  • Country: jo
  • I am the cult of personality
    • Thundertronics
Re: My PSU design ripple and noise with picture measurements
« Reply #17 on: August 30, 2021, 06:29:03 pm »
So why I am not getting the performance I expected? I mean, the input to the switchers should already be very clean in order for them to make a clean output right? therefore we need to heavily filter the 12v rail.

any suggestions besides those of my previous reply?

I picked cheap and suitable parts from LCSC without much hassle about characteristics. I cared about ceramic caps to be of high voltage, bigger package (for bias stuff), and a 22uF value. ferrite beads after the switchers are essential since they are part of the control loop itself and necessary to give very low output noise and ripple. FB on inputs and 12v is my own doing.

I am open to your suggestions.

Online T3sl4co1l

  • Super Contributor
  • ***
  • Posts: 22001
  • Country: us
  • Expert, Analog Electronics, PCB Layout, EMC
    • Seven Transistor Labs
Re: My PSU design ripple and noise with picture measurements
« Reply #18 on: August 30, 2021, 09:03:33 pm »
The problem is not so much the filter topology, it's the ground topology.  Consider what you would measure in a circuit such as this:



L2 might be quite small, say 10nH, but it is not at all irrelevant.

Consider further the equivalent circuit of your scope probes making connection to this circuit.  The ground clips have some inductance (fraction of a uH) up to the probe body not coupled with the probe tip, and the cables have some inductance between them (~1uH), looping through scope ground (and mains as applicable).  Thus the probes have an inductance divider equivalent circuit, where the ground clip draws current corresponding to the inductance between probes, and the voltage dropped by the clip is not sensed by the probe tip (but the rest of the cable is reasonably shielded, i.e. the signal and shield are well coupled).

This voltage is most apparent when probing with the tip attached to the ground clip, the combination being poked against various (mostly / hopefully "ground") points in the circuit; a null result shows no common mode noise with respect to the oscilloscope (presumably, whatever power supply / ground return path is shared by the power supply and scope), a non-null result shows there is voltage being dropped across this or other loops.

And this common-mode voltage cannot be filtered by taking on more LC stages, which accomplish only differential filtering.  There is another mode!


The best remedy is to put the connectors to one edge, solid ground pour (top and bottom, with adequate via stitching), over all, and regulators to the other (far) edge.  This shorts the connector grounds together, while putting distance between the critical switching loop(s), and minimizing the value of L2 (it can be a few nH in a good layout), and its size (some mm across), thus its fields drop off rapidly with distance.  And the connectors (and their respective filters) are placed at a distance from the regulator, keeping them well clear of that noise.

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline ezalys

  • Frequent Contributor
  • **
  • Posts: 322
  • Country: us
Re: My PSU design ripple and noise with picture measurements
« Reply #19 on: August 31, 2021, 02:22:50 am »
Even if it is a small inductor, doesn't the real impedance help with de-Qing your filter? I mean, I might just ask in what situations you see ferrites being useful.
 

Offline Vovk_Z

  • Super Contributor
  • ***
  • Posts: 1449
  • Country: ua
Re: My PSU design ripple and noise with picture measurements
« Reply #20 on: August 31, 2021, 02:58:57 am »
I would try smaller capacitance (4.7 uF, 10 uF) but larger case X7R caps (1206, 1210) instead of 22 uF 0805 caps, possibly several in parallel.
And the topology of an input cap on the PCB has a very large influence on the overall noise too. It must be very close to the noisy part. The PCB topology means much more than the C value (when we are talking about low-noise design)
« Last Edit: August 31, 2021, 03:11:14 am by Vovk_Z »
 

Offline VEGETATopic starter

  • Super Contributor
  • ***
  • Posts: 1992
  • Country: jo
  • I am the cult of personality
    • Thundertronics
Re: My PSU design ripple and noise with picture measurements
« Reply #21 on: August 31, 2021, 07:57:58 am »
Even if it is a small inductor, doesn't the real impedance help with de-Qing your filter? I mean, I might just ask in what situations you see ferrites being useful.

the ferrites are part of tps62913 circuit feedback loop. they are necessary to reach that very low noise and ripple figure. However, ferrites at input side of 12v is my own idea which I am not sure if it helps or not.

You talked about real impedance of L, I don't know the exact value but if damping is required then I can put a resistor in series with a 22uF capacitor but this value I read it should be very low, meaning like 0.3 ohms or a bit more... this is not hard. I could also put elec. caps to help damping it with their higher ESR.

My concern is killing the 12v noise and ripple first. This is why I got the idea of having big inductor like 100uH with 2 1000/2200/4700uF caps at the 12v source. then the inputs to the switchers are very easily done via ceramics. what about this idea? what could go wrong with these huge L and C values in terms of stability and effectiveness?

Quote
I would try smaller capacitance (4.7 uF, 10 uF) but larger case X7R caps (1206, 1210) instead of 22 uF 0805 caps, possibly several in parallel.
And the topology of an input cap on the PCB has a very large influence on the overall noise too. It must be very close to the noisy part. The PCB topology means much more than the C value (when we are talking about low-noise design)

switchers require 22uF caps, but I think I can fit a slightly bigger cap size of 1206 if I try harder.

Are you talking about the 12v rail or the switchers? shouldn't a big 47uH/100uH inductor with 2x of say 2200uF caps (before and after or just after) be able to filter out the ripple and noise? the cut-off frequency will be small and will attenuate a lot of the 250mV p-p of the input.

I figured that the switchers need clean input in order to give the clean output. they have > 65 dB PSRR for frequencies < 100 KHz which is good but still not good enough to eliminate 200mv p-p noise and ripple, therefore I would need to make it a lot less.

Quote
The best remedy is to put the connectors to one edge, solid ground pour (top and bottom, with adequate via stitching), over all, and regulators to the other (far) edge.  This shorts the connector grounds together, while putting distance between the critical switching loop(s), and minimizing the value of L2 (it can be a few nH in a good layout), and its size (some mm across), thus its fields drop off rapidly with distance.  And the connectors (and their respective filters) are placed at a distance from the regulator, keeping them well clear of that noise.

So I could just make bottom layer all one ground, but top layer has to have power pours for each switcher as seen in datasheet... but every other place can be GND pour with many vias to stitch it.

You mean I should re-arrange the board to have 12v input in top with its LC filter followed by the switchers circuit which is tight and compact. no distance needed between the 12v and switchers? then just send the 3.3v and 5v regulated rails to output connectors? this would mean long distance for them.

Or maybe put the switcher circuit close to the connector with its filter caps very close to output connectors while all this is far from 12v circuit?

Quote
T3sl4co1l

Do you mind if I sent the board to you? to do some scope measurements the proper way and so on. this will really help me.

Online T3sl4co1l

  • Super Contributor
  • ***
  • Posts: 22001
  • Country: us
  • Expert, Analog Electronics, PCB Layout, EMC
    • Seven Transistor Labs
Re: My PSU design ripple and noise with picture measurements
« Reply #22 on: August 31, 2021, 03:40:11 pm »
Even if it is a small inductor, doesn't the real impedance help with de-Qing your filter? I mean, I might just ask in what situations you see ferrites being useful.

Mind these aren't simply miniature ferrite beads like you're used to; the impedance is largely imaginary up to, what was it, 300, 500MHz?  The peak impedance is in the GHz.  They're actually pretty good inductors at those lower frequencies.

As I demonstrated earlier, the advantage is building a filter against the very low ESR of the ceramic caps.  The disadvantage is the Fc is very high, doing an okay job of filtering harmonics and a poor job of fundamental (Fsw) ripple.


the ferrites are part of tps62913 circuit feedback loop. they are necessary to reach that very low noise and ripple figure. However, ferrites at input side of 12v is my own idea which I am not sure if it helps or not.

You've repeated this several times, but you're simply quoting from the datasheet, no?  Do you understand in what way they are necessary, and to what extent they function?

Without any understanding of the regulator's internal characteristics, I am confident to say that, if I merely sat down with an eval board and a handful of assorted filter components, I would be able to improve the input and output noise characteristics by a hundredfold.  (Or by perhaps 1k to 10k times, in case of your original example -- I would need some additional materials then, to build a shield around the PCB, to avoid the ground-loop issue.)

You can give this a spin, yourself, I think, on TI's WEBENCH simulator.  They should have a full-enough model of this part, and enough flexibility to implement a variety of filter types.  It may even design them for you, and simulate the likely ripple -- again, assuming ground-loop voltage is avoided.

The biggest key is likely using a bulk cap (capacitance several times the surrounding (low-ESR) capacitance (C), with ESR = sqrt(L/C), L being the filter inductor(s)).  This "de-Qs" the filter, as ezalys hinted at.  Other terms: damping, snubbing, terminating.

A filter is an impedance network, and just like a transmission line, it must operate into a terminated load resistance; it just happens that its characteristic impedance is low (for typical power supply applications), and so will be the resistance needed for it.  And, since we want to pass DC without shorting it, we put a coupling capacitor in series with the resistance, and as a coupling capacitor, it simply needs enough capacitance so that it's largely resistive at the frequencies relevant to the filter (namely the transition band of the filter, Fc = 1 / (2 pi sqrt(LC)) give or take say a factor of 2).


Quote
You talked about real impedance of L, I don't know the exact value but if damping is required then I can put a resistor in series with a 22uF capacitor but this value I read it should be very low, meaning like 0.3 ohms or a bit more... this is not hard. I could also put elec. caps to help damping it with their higher ESR.

So, exactly this; but not just one, it will be dominated by the others in parallel; the balance must be more like 1 alone versus 2 or 3 with ESR.  So it's kind of inefficient to do this with ceramic caps plus external resistor, and electrolytic or tantalum are often preferred.


Quote
My concern is killing the 12v noise and ripple first. This is why I got the idea of having big inductor like 100uH with 2 1000/2200/4700uF caps at the 12v source. then the inputs to the switchers are very easily done via ceramics. what about this idea? what could go wrong with these huge L and C values in terms of stability and effectiveness?

More likely 0.1 to 4.7uH is more than sufficient, and such large values aren't necessary.  You have very little to gain, I think, from going to any larger value.


Quote
I figured that the switchers need clean input in order to give the clean output. they have > 65 dB PSRR for frequencies < 100 KHz which is good but still not good enough to eliminate 200mv p-p noise and ripple, therefore I would need to make it a lot less.

Excuse me, do you understand what 65dB represents?

The observed noise isn't at <100kHz anyway, I'm willing to bet.  All the more reason why filtering is needed, but also why common mode filtering is critical.


Quote
So I could just make bottom layer all one ground, but top layer has to have power pours for each switcher as seen in datasheet... but every other place can be GND pour with many vias to stitch it.

Yes!

The power pours can be smaller; they don't need to be much bigger than the chip, really, and that's all they show in the datasheet anyway.  Around them, can be filled with GND.


Quote
You mean I should re-arrange the board to have 12v input in top with its LC filter followed by the switchers circuit which is tight and compact. no distance needed between the 12v and switchers? then just send the 3.3v and 5v regulated rails to output connectors? this would mean long distance for them.

Connectors, plural.  All of them.  If you can't physically move the 12V input down to the bottom edge, then route it down along its side, over by the outputs, and place its filter there.  Slot the ground pour beside this route, so that any ground loop currents by the regulators, do not bypass the filter and jump into the 12V connector directly.

DO NOT ROUTE TRACES OR POWER POURS OVER A GROUND SLOT.


Quote
Do you mind if I sent the board to you? to do some scope measurements the proper way and so on. this will really help me.

Honestly I don't think it will make much difference.  And the grounding problem is not an easy one to solve by hand, even with heroic effort (cutting and patching pours!).

Also, you have some lingering questions about the quality of your source power supplies, I think.  You should evaluate those as well.

What I think would be much more valuable, is simply iterating the layout.  Layouts are cheap.  If it took you a long time to build the first one, I can understand your hesitance, but appreciate that it will go faster each and every time after, as you gain familiarity with the tools, and begin to understand the current flow paths.  We've spent far, far more time in this thread, than it would take an experienced designer to re-lay the entire circuit.  And proto PCBs are cheap to order, unless you're strapped for cash of course, in which case all the more reason to get it right the first time.

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 

Offline Vovk_Z

  • Super Contributor
  • ***
  • Posts: 1449
  • Country: ua
Re: My PSU design ripple and noise with picture measurements
« Reply #23 on: August 31, 2021, 03:54:55 pm »
Are you talking about the 12v rail or the switchers? shouldn't a big 47uH/100uH inductor with 2x of say 2200uF caps (before and after or just after) be able to filter out the ripple and noise? the cut-off frequency will be small and will attenuate a lot of the 250mV p-p of the input.

I figured that the switchers need clean input in order to give the clean output. they have > 65 dB PSRR for frequencies < 100 KHz which is good but still not good enough to eliminate 200mv p-p noise and ripple, therefore I would need to make it a lot less.
Yes, I'm talking about an input (12VDC side) cap. The main thing is rather not to filter, but to make low-impedance low-area input loop. 2200 uF or even 22 0000000 uF caps won't help, but 1 uF well-placed may do the job.
Your DC-DC has some PSRR so it doesn't need very "clean input". The purpose of input filter is not to filter an input voltage, but rather to isolate your DC-DC from other circuit. It filters spreading a generated noise into other area through input.
« Last Edit: August 31, 2021, 04:03:08 pm by Vovk_Z »
 

Offline VEGETATopic starter

  • Super Contributor
  • ***
  • Posts: 1992
  • Country: jo
  • I am the cult of personality
    • Thundertronics
Re: My PSU design ripple and noise with picture measurements
« Reply #24 on: August 31, 2021, 05:22:21 pm »
Quote
You've repeated this several times, but you're simply quoting from the datasheet, no?  Do you understand in what way they are necessary, and to what extent they function?

I didn't dig into this much tbh, but they keep repeating it as their way to achieve that very low noise\ripple figure. Also, as you mentioned, the FBs won't do anything bad if by any chance they didn't do good. I don't think they are the problem here, do you?

Quote
You can give this a spin, yourself, I think, on TI's WEBENCH simulator.

I will try that sometime soon I hope. But maybe it is not accurate since it may not include the type of noise from source.

Quote
The biggest key is likely using a bulk cap (capacitance several times the surrounding (low-ESR) capacitance (C), with ESR = sqrt(L/C), L being the filter inductor(s)).  This "de-Qs" the filter, as ezalys hinted at.  Other terms: damping, snubbing, terminating.

you mean the 12v input side LC filter? it does have 1000uF elec. cap at the end but not directly after the main 4.7uH inductor.

Or you mean the input to each switcher? there I can put 2 47uF elec. caps in parallel plus say 2 22uF ceramics and one 2.2nF to be closest to the IC pin as requested in datasheet. How about that? putting 1000uF instead of the 2 47uF ones or instead of one of them is doable too but needs a lot of rearrangement.


Quote
More likely 0.1 to 4.7uH is more than sufficient, and such large values aren't necessary.  You have very little to gain, I think, from going to any larger value.

I already have 4.7uH since I used it in the switchers circuit. as you see, it is followed by other 1uF ones in series plus the caps..etc.

However, is putting a larger (47uH) inductor will make it bad? notice that the 12v input sources are assumed to be bad in terms of ripple and noise... one source could have little noise\ripple and another one is large ripple..etc. this design is done assuming the people get any reasonably-good 12v 3amps wall-adapter and it should work fine.

Quote
The observed noise isn't at <100kHz anyway, I'm willing to bet.  All the more reason why filtering is needed, but also why common mode filtering is critical.

You don't need to bet, I posted pictures with this reply to show 12v input, 3.3v output, and 5v output for both MYPSU and OTHERPSU as label suggests. Looks like frequency of the ripple is a lot less than expected which should be attenuated better IMO. I think with pictures you can judge better.

Notice that ground probing sometimes shows 100Hz and sometimes > 800Hz... I posted the picture of 800Hz but from waveform you can judge better.

Quote
Connectors, plural.  All of them.  If you can't physically move the 12V input down to the bottom edge, then route it down along its side, over by the outputs, and place its filter there.

I am afraid 12v input and its switch connector have to be on top.

Can't I put it in top along with its filters then put close vias to GND for each cap?

also, will the switchers and their circuit be near the 12v connector and filters?

if so, then your idea is to make the output connector very far from the actual switching loop... with bulk caps near the output connector itself rather than the switchers?


Quote
Yes, I'm talking about an input (12VDC side) cap. The main thing is rather not to filter, but to make low-impedance low-area input loop. 2200 uF or even 22 0000000 uF caps won't help, but 1 uF well-placed may do the job.
Your DC-DC has some PSRR so it doesn't need very "clean input". The purpose of input filter is not to filter an input voltage, but rather to isolate your DC-DC from other circuit. It filters spreading a generated noise into other area through input.

Hmmm so you agree with T3sl4co1l on the ground pour, and with me on putting short and close ground vias to caps of input filter and switcher circuit?

still, big LC values are better than small ones for 12v rail... due to different quality of input sources. So, isolating the DC-DC switchers from input 12v is done via good routing and making very short loops... plus, making output connector with its caps far from switcher loop itself. correct?

Do you honestly think we can match the < 1mV p-p output capability of the switcher by doing this?

thanks all for your help, I am willing to enhance the design as much as I can.


_________

as for making another board.. it is not cheap since it needs machine setup and so on. I even got a good discount from allpcb this time.

I can however, use JLC PCB very cheap service which has everything from inductors and caps but it doesn't have that particular ferrite bead and of course the TPS62913 chip which is extremely small.. I don't have much confident I could desolder it from the current boards then re-solder it on the cheap jlcpcb produced board.


Share me

Digg  Facebook  SlashDot  Delicious  Technorati  Twitter  Google  Yahoo
Smf