My PSU design ripple and noise with picture measurements

[Vovk_Z]

I can't say anything about ground pour. It's a subject which is better to investigate with a real PCB on hands. I'm not as experienced to give all the answers via the internet, unfortunately. There may be Application notes covering this topic for other similar ICs.

[iMo]

I would highly recommend you to start with LTSpice simulator, for example (it is free and you may get help here).
You should put all your parasitics (ie. the trace inductance L2 in Tim's schematics above, as an example), inlcusive RLC of your capacitors and inductors, resistance/inductance of your pcb tracks, etc.

I've done similar exercise recently - where on the o'scope I saw 3Vpp ringing instead of a clean signal. I did a simulation with my real 20mm long wires (20nH parasitic inductance) and I got exactly the same picture in the LTSpice.
Thus instead of excessive soldering and elaborating do spend more time with simulation, it works.

Also - a filter made of 100uH and 1000uF would work perfectly on a paper, in reality not so - see below your low pass (the values are examples only)..

[T3sl4co1l]

You know what the fuzzy waveforms mean, right?  Zoom in until you see smooth curves.  There's high frequency noise that's merely riding on, or modulated by, those low frequencies.

Tim

[thm_w]

gofundme for OP to get a decent starter oscilloscope?
 

[VEGETA]

You know what the fuzzy waveforms mean, right?  Zoom in until you see smooth curves.  There's high frequency noise that's merely riding on, or modulated by, those low frequencies.

Tim

What is your opinion on the actual waveforms I posted in my latest reply? they show everything... I hope we can understand the problem from them. what shocked me is that the frequency is very little < 100 Hz, what is going on?

Right now, the to-do solution is better routing and grounding, plus to see which values of CLC circuit to put + input filters to switchers.

I am interested on your analysis of waveforms of scope.

[xavier60]

You know what the fuzzy waveforms mean, right?  Zoom in until you see smooth curves.  There's high frequency noise that's merely riding on, or modulated by, those low frequencies.

Tim

What is your opinion on the actual waveforms I posted in my latest reply? they show everything... I hope we can understand the problem from them. what shocked me is that the frequency is very little < 100 Hz, what is going on?

Right now, the to-do solution is better routing and grounding, plus to see which values of CLC circuit to put + input filters to switchers.

I am interested on your analysis of waveforms of scope.

The 100Hz modulation is likely caused by the bridge rectifier at the mains input of a SMPS. Because the diodes conduct only at the mains waveform's peaks, they act as switches that conduct switching noise.

[Vovk_Z]

what shocked me is that the frequency is very little < 100 Hz, what is going on?

Low frequency oscillation is a feedback instability. It happens in some voltage-current modes. There can be application note how to get rid of them (may not).
I've seen such a thing in one of my DC-DC modules with XL4016, there was found a decision on the internet, to use C or RC-circuit in parallel to IC feedback resistor. I played with it and finally used 10 nF cap in parallel to feedback resistor.

[Vovk_Z]

Hmmm so you agree with T3sl4co1l on the ground pour, and with me on putting short and close ground vias to caps of input filter and switcher circuit?

Experience I have: I have low-noise DC-DC (with XL4016) with less then 1 mV RMS noise and I didn't use large ground pour. Design was made with wide printed wires which go somewhere near each other, more or less close to each other.

[Vovk_Z]

still, big LC values are better than small ones for 12v rail... due to different quality of input sources. So, isolating the DC-DC switchers from input 12v is done via good routing and making very short loops... plus, making output connector with its caps far from switcher loop itself. correct?

Big L values everywhere except main switcher L may worsen stability but not help. That's one of the reasons you are told not to use large L values.
For example, it you decide to add post-filter after switcher with large L - it will provoke instability. And similar things may happen with unlucky L before the switcher. A typical 'safe' post-filter L value may be no more than 10-20% of a main switcher L.

[VEGETA]

The 100Hz modulation is likely caused by the bridge rectifier at the mains input of a SMPS. Because the diodes conduct only at the mains waveform's peaks, they act as switches that conduct switching noise.

there are no AC on board, I use 12v laptop-style SMPS. It works perfectly fine in terms of continuous operation without issues, I played Dreamcast using it for hours and hours.

there was found a decision on the internet, to use C or RC-circuit in parallel to IC feedback resistor.

that is called bootstrap capacitor if I am correct, and I have one for each switcher feedback as mentioned in datasheet. Mine is 1uF which is the best value which includes maximum performance (stability, noise cancellation) while being not near the upper limit.


However, if this analysis is correct, it may be coming from the 12v input wall charger itself.

Don't you think some extra input filter elec. caps can help here since it is low frequency?

Experience I have: I have low-noise DC-DC (with XL4016) with less then 1 mV RMS noise and I didn't use large ground pour. Design was made with wide printed wires which go somewhere near each other, more or less close to each other.

I am interested in this solution if you can explain more or post circuit or methods.

Big L values everywhere except main switcher L may worsen stability but not help. That's one of the reasons you are told not to use large L values.
For example, it you decide to add post-filter after switcher with large L - it will provoke instability. And similar things may happen with unlucky L before the switcher. A typical 'safe' post-filter L value may be no more than 10-20% of a main switcher L.

Right now I didn't add any but maybe a 1uH is good? assuming the main switcher L is 4.7uH.

That is for post-filter, but why also pre-filter?
____

from my previous waveforms... how much is the actual ripple and noise figure is? how can we know it for sure without the oscillation?

[Terry Bites]

TI publish a usefulk guide on ouput filtering. https://www.google.co.uk/url?sa=i&url=https%3A%2F%2Fwww.ti.com%2Flit%2Fpdf%2Fsnva871&psig=AOvVaw3GzlT0oUMPBwz4b9SZrIwX&ust=1630586197218000&source=images&cd=vfe&ved=0CAcQjhxqFwoTCPjAlaDl3fICFQAAAAAdAAAAABAD

[Vovk_Z]

there was found a decision on the internet, to use C or RC-circuit in parallel to IC feedback resistor.

that is called bootstrap capacitor if I am correct, and I have one for each switcher feedback as mentioned in datasheet. Mine is 1uF which is the best value which includes maximum performance (stability, noise cancellation) while being not near the upper limit.

No, I am definitely not talking about bootstrap cap. I'm talking about additional feedback elements (not shown in the datasheet).

[xavier60]

A mains powered SMPS with PFC stage could also possibly produce 100Hz modulated interference.

[Vovk_Z]

I am interested in this solution if you can explain more or post circuit or methods.

There is nothing interesting to show because the PCB exists in only 'first breed' generation (zero version), but real device have some small changes and improvements made to achieve low noise (<1 mV RMS), made with a knife and wires. So there isn't much sense to show it.
In the attachment I show an additional cap I'm talking about which calmed my switcher.

[VEGETA]

I am interested in this solution if you can explain more or post circuit or methods.

There is nothing interesting to show because the PCB exists in only 'first breed' generation (zero version), but real device have some small changes and improvements made to achieve low noise (<1 mV RMS), made with a knife and wires. So there isn't much sense to show it.
In the attachment I show an additional cap I'm talking about which calmed my switcher.

Please check my schematic here.

I understood what it is but failed to remember the name, it is called "feed-forward capacitor" and it is not specific for TPS62913 but rather for all DC-DC converters. I choose 1uF, I wonder if low values such as 2.2nF or your 10nF is better. they claim their low noise performance is done without it.

TPS62913 has also the NR/SS cap which affects soft-start and noise reduction, that too is 1uF.

[Vovk_Z]

Please check my schematic here.

C22, C23 - 1 uF, really? Why so large value?

[T3sl4co1l]

What is your opinion on the actual waveforms I posted in my latest reply? they show everything... I hope we can understand the problem from them. what shocked me is that the frequency is very little < 100 Hz, what is going on?

They show very little, the scale is 25ms and the waveforms are solid blocks of pixels indicating multiple cycles per pixel.  More like 10µs/div would be more interesting.

Tim

[Vovk_Z]

that is called bootstrap capacitor if I am correct, and I have one for each switcher feedback as mentioned in datasheet. Mine is 1uF which is the best value which includes maximum performance (stability, noise cancellation) while being not near the upper limit.

I guess you confused it (C22, C23) with Cnr/ss. This is possibly a root of your low-freq oscillation.

[Vovk_Z]

I choose 1uF, I wonder if low values such as 2.2nF or your 10nF is better. they claim their low noise performance is done without it.
TPS62913 has also the NR/SS cap which affects soft-start and noise reduction, that too is 1uF.

So you haven't tried yet another value for C22, C23 and ask us for a solution?

[VEGETA]

I choose 1uF, I wonder if low values such as 2.2nF or your 10nF is better. they claim their low noise performance is done without it.
TPS62913 has also the NR/SS cap which affects soft-start and noise reduction, that too is 1uF.

So you haven't tried yet another value for C22, C23 and ask us for a solution?

I didn't find a value recommended for these so I put the same as SS\NR one. but why is this the reason for the issue? I mean, the switcher regulates very precisely without issues.

They show very little, the scale is 25ms and the waveforms are solid blocks of pixels indicating multiple cycles per pixel.  More like 10µs/div would be more interesting.

Tim

but doesn't it show the ripple period and its magnitude?

[T3sl4co1l]

There are many periods and magnitudes of interest here...

[Vovk_Z]

I didn't find a value recommended for these so I put the same as SS\NR one. but why is this the reason for the issue? I mean, the switcher regulates very precisely without issues.

"NP" near that cap means "do not place".

[VEGETA]

I am now re-making the board, I have attached the current schematic. I have added one common-mode choke to help attenuate the common-mode ripple if it exist. all 22uF caps are 1206 package instead of 0805.

I have started doing the PCB, right now I put full ground pour (solid, no thermal reliefs) and also top all solid ground plain except of course the traces. Each GND pad (filter caps, etc..)  has a very close via to ground plane.

[VEGETA]

I removed 1 22uF from each switchers to allow maximum of 200uF total capacitance.

Should I add 1uF before and after the common-mode choke?

right now this is the CMC I choose: https://www.lcsc.com/product-detail/Common-Mode-Filters_Murata-Electronics-DLW5BTM501SQ2L_C91597.html

relatively cheap murata from LCSC. I could go for cheaper stuff as well if they won't make a difference.

[VEGETA]

I have done the new layout based on last schematic. Please see it in attachments.

I put bottom layer full ground pour + top layer full ground pour except for the traces and vias. Also in top plane there is a small +12v pour near top right as you can see.

Nearly every cap GND pin has a ground via nearby very very close to it.

Please rate the design and give me your awesome feedback. I am willing to learn.