Electronics > Projects, Designs, and Technical Stuff
My version of Testbench power supply
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bogdant:
Here is my version of the variable power supply.
The intention is to build a 2 channel power supply: one channel is fully analogical and one is digital.
The input will be 2 transformers 12V*2 middle tapped, 2.5A secondary. The analogical channel is a series regulator implemented with a n-mosfet with current constant.
On the second channel I try to implement a synchronous buck stage controlled by microcontroller STM32F723.
Are there any big error in design(blunders)? The project is for learning electronics, so cost is not take into consideration here.

mvs:

--- Quote from: bogdant on January 14, 2019, 07:47:06 am ---On the second channel I try to implement a synchronous buck stage controlled by microcontroller STM32F723.

--- End quote ---
Do you plan to have DCM operation at low currents? It might get tricky with sync rectification there.
I would put a Schottky diode parallel to lower MOSFET, just in case.


--- Quote ---Are there any big error in design(blunders)?
--- End quote ---
Outputs can be on, while MCU is in reset condition. It is no go for a lab PSU.
Add some resistors to define state of EN_BUCK, VDAC, IDAC nets, while MCU is not able to control them.

DAC is not able to output true 0V, LM324 do have some offset, so your lowest voltage may be a bit higher then 0V. Add separate output on/off control to analog channel.
001:
Avoid microcontroller in regulation loop
it is not fast as analog feedback and can`t provide uninterrupted regulation  by design
Use MC for service functions only
mvs:

--- Quote from: 001 on January 14, 2019, 12:52:43 pm ---Avoid microcontroller in regulation loop
it is not fast as analog feedback and can`t provide uninterrupted regulation  by design

--- End quote ---
Yes, but bogdant may learn a lot by building a PSU with digital control loop.
Large inductor value of 560uH means also quite low frequency, so there might be no need for fast loop at all.
David Hess:
1. Multiple stages in the current control loop makes frequency compensation difficult.  U13C and U13D should be combined into one stage.

2. T1 provides uncontrolled non-linear voltage gain within the voltage and current control loops making frequency compensation impossible.  The outputs of the control loops could drive the pass transistor directly with unity gain.

3. The high capacitance of pass transistor U16 should be driven from a lower impedance.

Fixing the above would allow better dynamic performance and a lower output capacitance for C9.

4. VPOT should be filtered and a safety resistor added between the wiper and ground.

5. IPOT should be filtered and a safety resistor added between the wiper and ground.

6. R44 is the wrong value for input bias current cancellation.
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