Author Topic: Mysterious FET destruction on high-power H bridge  (Read 9400 times)

0 Members and 1 Guest are viewing this topic.

Offline rschlaikjerTopic starter

  • Contributor
  • Posts: 10
  • Country: us
Mysterious FET destruction on high-power H bridge
« on: June 21, 2019, 04:07:53 pm »
I have a custom motor driver board design that is failing with shorted drive MOSFETs under certain conditions, but am stumped as to what might be the precise cause of failure. The FET destruction occurs when the control system attempts to fast-stop the motor by backdriving it, which works fine for power supply currents up to 40A or so, but when connected to a 100A supply (as we'd like to in order to achieve the full drive capacity of the motor), after one or two back-drive events the bridge fails completely short.

For context, here is the schematic for the H-bridge and associated gate driver - I'm using the MC33883 gate driver in a configuration identical to the reference implementation in the [datasheet](https://www.nxp.com/docs/en/data-sheet/MC33883.pdf) except that to get the gate switching time down I am using 10R series
resistors instead of 50R. The DRIVE+/- output signals from this sheet go through a fail-safe relay and then directly to the motor.



The sub-sheet to the right is just the 74LVC mux logic for the control signals -> gate control signals; the logic is set up such that the mosfets are driven based on the MOTOR_A/B signals like so:
Q2 = A and not B
Q1 = B
Q7 = B and not A
Q8 = A

Dead time is inserted by the device controlling this board, and a 200ns value is used at a PWM carrier frequency of 100kHz. Here's a trace of the control signal completely switching direction to verify that there's no shoot through - purple/blue traces are the MOTOR_A/MOTOR_B lines, yellow and teal are the low-side / high side gates of a single half-bridge (TP5/6 in schematic above). Some of the ringing is likely my very how-you-doing scope probes, and not actual system noise.



The MOSTFETs fail perfectly short - they are able to short a tens of amps to ground without any power dissipation at all, which flummoxed my "which part has become hot" debugging strategy for a while.
Initially, I thought the problem might be that the back-emf of the motor was, when polarity was reversed, spiking the rail enough to reach the breakdown voltage of these mosfets, but the part I'm using is the MCU80N06-TP, which has a Vdss of 60V and should be safe. To verify, I took a trace of the motor controller reversing direction suddenly at speed:



Teal / Yellow are the motor terminal voltages, and the pink trace is the supply rail. As you can see, it does spike, but I wouldn't think it does so enough to cause damage. Just in case, I added a snubber circuit to the voltage rail like so (J8 here connects to a chassis mount power resistor), replaced the burned out FETs, and tried again.



This time, with the snubbing, you can see that the peak voltage caps out a lot lower, and again ought to be well within the safe range for these FETs:



But alas, even with this the FETs are destroyed.

Does anyone have any ideas as to what might be going on here, or other things that I should try taking traces of to shed more light? Been banging my head against this.

Thanks.
 

Offline Siwastaja

  • Super Contributor
  • ***
  • Posts: 9336
  • Country: fi
Re: Mysterious FET destruction on high-power H bridge
« Reply #1 on: June 21, 2019, 04:15:23 pm »
I fail to find the current shunt resistors or hall sensors from the schematic. You do have pulse-by-pulse current limit, don't you, right? It's completely necessary in such circuit, otherwise blown FETs guaranteed.

A non-related comment, 100kHz is over the sane range in most high power motor controllers. Probably not the cause of your issues, but definitely making things harder, and increasing losses for no reason. Your deadtime alone is a significant portion of your switching cycle. Typically motor drivers this size run at around 10-40 kHz.
« Last Edit: June 21, 2019, 04:17:48 pm by Siwastaja »
 

Offline rschlaikjerTopic starter

  • Contributor
  • Posts: 10
  • Country: us
Re: Mysterious FET destruction on high-power H bridge
« Reply #2 on: June 21, 2019, 04:25:20 pm »
We do have a ACS781LL ±100A hall effect sensor in the motor path as well.
However, the data from that is not currently used as a break input, just as feedback to the control system - these FETs are rated at 80A continuous / 200A pulsed, which I had assumed would mean we could get away with switching a load from a 100A supply. Is pulsed current failure consistent with the resulting shorted state of the FET? Notably, the FET (package, at any rate) is not hot after failure - thermal camera reports at is only ~10-20°C above ambient.
If you do think that this is the problem, we can restructure the board such that if the current goes above (say) 90A the comparator output from that inhibits the A/B motor signals.

Thanks for the advice about the PWM frequency - we had been using 20kHz in a previous system, but had received advice from the only person we actually know in real life with motor driving experience, and they had suggested a much higher frequency. We'll revert that back down.
 

Offline cur8xgo

  • Regular Contributor
  • *
  • Posts: 148
  • Country: us
Re: Mysterious FET destruction on high-power H bridge
« Reply #3 on: June 21, 2019, 04:35:07 pm »

Does anyone have any ideas as to what might be going on here, or other things that I should try taking traces of to shed more light? Been banging my head against this.

Thanks.

Hmm. So you switch to a 100A supply and they die. Question: is the actual motor current different when you switch the supply? Or are you doing the 40A test the same was as the 100A test? (I dunno..no load just spinning free?).

Can you kill the fets by doing anything else? Like starting, coasting to a stop, then starting again, on the 100A supply etc..

When you have this motor running and you suddenly back drive it..where is that motor current going to go and how high is the voltage going to get when it goes there? Check your Vds and Vgs pathways. Just because you have a "snubber" doesn't mean its working or can do its job. Your PCB layout and parasitics can matter alot at 100A. So can diodes that don't switch fast enough.

I'd do some forensics:

Failure signature of electrical overstress on power MOSFETs
https://assets.nexperia.com/documents/application-note/AN11243.pdf

If you think about it..failing short is a very specific failure mode. Fets not really intended for avalanche (even though they may have a rating) can fail short from it. Also excess Vgs can fail short as well. (I think..that paper probably talks about it.)

Have you been carefully probing (with super short ground lead) directly to the fets themselves to monitor voltages? I would do that. You should be able to catch things in the act. Maybe you can do it on the 40A supply so you dont kill the fet, but see a transient which is borderline or suspicious.

I vote Vgs and/or Vgs being exceeded.


 

Offline rschlaikjerTopic starter

  • Contributor
  • Posts: 10
  • Country: us
Re: Mysterious FET destruction on high-power H bridge
« Reply #4 on: June 21, 2019, 04:46:49 pm »
Quote
Question: is the actual motor current different when you switch the supply?

Yes - the motor does have some load on it, but it is also just a motor with a very large stall current (134A), so on the 40A supply the acceleration is limited by the lower available power.

Here is a trace of the data captured by the control system (not scope) during a destructive test: purple is the PWM (±255), light pinkish is the motor current measured through the hall sensor (±100A range) and red is the motor velocity in arbitrary units. The motor driver survived two oscillations before the FETs croaked and the supply went into overcurrent lockout mode, and you can see the chart trail off to the right.



Running in the same direction constantly doesn't seem to cause problems; it seems to be the direction changing that kills it. I'll replace these FETs and give it another test though.
 

Offline cur8xgo

  • Regular Contributor
  • *
  • Posts: 148
  • Country: us
Re: Mysterious FET destruction on high-power H bridge
« Reply #5 on: June 21, 2019, 05:01:59 pm »
Quote
Question: is the actual motor current different when you switch the supply?

Yes - the motor does have some load on it, but it is also just a motor with a very large stall current (134A), so on the 40A supply the acceleration is limited by the lower available power.

Here is a trace of the data captured by the control system (not scope) during a destructive test: purple is the PWM (±255), light pinkish is the motor current measured through the hall sensor (±100A range) and red is the motor velocity in arbitrary units. The motor driver survived two oscillations before the FETs croaked and the supply went into overcurrent lockout mode, and you can see the chart trail off to the right.



Running in the same direction constantly doesn't seem to cause problems; it seems to be the direction changing that kills it. I'll replace these FETs and give it another test though.

I dont think this really tells much. I would try the other things I suggested in my last post. Just replacing the fets and trying again wont really help unless you make some direct measurements to the fet pins to try and catch the transient(s). Attach only 1 probe to the scope and connect it directly across the area of interest. I.e. Tip to fet D and ground (via very short wire wound on probe) to S, or tip to G and ground to S..etc..Its got to be there. And see if you can figure out what failure mode the fet is in from that document. Failing short nicely and quietly is very different than exploding.

 

Offline cur8xgo

  • Regular Contributor
  • *
  • Posts: 148
  • Country: us
Re: Mysterious FET destruction on high-power H bridge
« Reply #6 on: June 21, 2019, 05:11:02 pm »
ALSO: Make sure your scope ground is floating relative to whatever you are probing..otherwise boom
 

Offline duak

  • Super Contributor
  • ***
  • Posts: 1048
  • Country: ca
Re: Mysterious FET destruction on high-power H bridge
« Reply #7 on: June 21, 2019, 05:52:05 pm »
I developed a PWM driver in the mid 80's that used a 100 kHz switching frequency.  It worked with a 200 VDC bus and delivered 3 phases at 15 A.

The MCC datasheet I found for those FETs  did not show a safe operating area - it would explain what the peak current actually could be in terms of time duration.  When I look at your test to destruction graph, I see the red velocity trace flattening out on the second forward run section implying a current limit.  The pink current trace is also not going to zero current before reversing.  I think the FETS are going into thermal distress. ie., too much peak current.

This current may not be just load current but could be from the recovered charge from commutating the body diode current in the complementary FET.  What diodes are in parallel with the FETs?  They appear to be schottky. Even though they have a lower forward voltage drop than the FET body diode, they may not take all of the load current, so the FET or its body diode has to carry it.  Do you know what the net series inductance ot the load is?

C15 and C16 are also contributing to the peak current because they have to be charged and disharged every cycle.  Are they there for some sort of EMI reduction?  I calculate a 225 mW dissipation from each - small potatoes but it should be considered.
« Last Edit: June 21, 2019, 05:54:19 pm by duak »
 

Offline cur8xgo

  • Regular Contributor
  • *
  • Posts: 148
  • Country: us
Re: Mysterious FET destruction on high-power H bridge
« Reply #8 on: June 21, 2019, 06:04:46 pm »
I developed a PWM driver in the mid 80's that used a 100 kHz switching frequency.  It worked with a 200 VDC bus and delivered 3 phases at 15 A.

The MCC datasheet I found for those FETs  did not show a safe operating area - it would explain what the peak current actually could be in terms of time duration.  When I look at your test to destruction graph, I see the red velocity trace flattening out on the second forward run section implying a current limit.  The pink current trace is also not going to zero current before reversing.  I think the FETS are going into thermal distress. ie., too much peak current.

This current may not be just load current but could be from the recovered charge from commutating the body diode current in the complementary FET.  What diodes are in parallel with the FETs?  They appear to be schottky. Even though they have a lower forward voltage drop than the FET body diode, they may not take all of the load current, so the FET or its body diode has to carry it.  Do you know what the net series inductance ot the load is?

C15 and C16 are also contributing to the peak current because they have to be charged and disharged every cycle.  Are they there for some sort of EMI reduction?  I calculate a 225 mW dissipation from each - small potatoes but it should be considered.

Notice the pink trace flattening out on the last (dying) cycle? At about 40V. Thats 20V below (in other words, acceptable) the fet Vds rating. Then current drops to zero. Hmm

Of course if we had Vds and Vgs traces...

Don't you think its would be odd for the fet to fail short from overcurrent? Unless its avalanche, shouldn't if fail open?


 

Offline Mechatrommer

  • Super Contributor
  • ***
  • Posts: 11714
  • Country: my
  • reassessing directives...
Re: Mysterious FET destruction on high-power H bridge
« Reply #9 on: June 21, 2019, 06:06:18 pm »
few things i noted from dso captures and datasheet you provided (i may be mistaken):
1) Vcc can spike to 26V+ (without snubber) which near the limit of Vcc2 pin of MC33883 (28V)
2) during reverse brake. Vcc spike to 26V (Q2's Vd) and Q2's Vs to 32V (without snubber), this put high side mosfets in reverse polarity and D5,D9 clamp diodes are not doing their job, what are D5,D9?
3) Vgate for high side mosfet only 15V, with 12V Vs, there is only 3Vgs available. anything greater than 15A will make MCU80N06 works in linear mode. or maybe i'm mistaken high side Vg is 7V (teal instead of yellow trace)? if so, is 7V relative to Vs? or GND? are you measuring with differential probe? a bit confusing here.

ref:
https://www.nxp.com/docs/en/data-sheet/MC33883.pdf
https://pdf1.alldatasheet.com/datasheet-pdf/view/1019304/MCC/MCU80N06.html

edit to back emf'ed reply below ;D
Quote
C15 and C16 are also contributing to the peak current because they have to be charged and disharged every cycle.  Are they there for some sort of EMI reduction?
I'll be honest, I'm not 100% sure of their purpose - they are copied from the application schematic of the MC33883, page 18:
https://medium.com/jungletronics/dc-motors-against-back-emf-589d8ed174cc
« Last Edit: June 21, 2019, 06:27:12 pm by Mechatrommer »
Nature: Evolution and the Illusion of Randomness (Stephen L. Talbott): Its now indisputable that... organisms “expertise” contextualizes its genome, and its nonsense to say that these powers are under the control of the genome being contextualized - Barbara McClintock
 

Offline Siwastaja

  • Super Contributor
  • ***
  • Posts: 9336
  • Country: fi
Re: Mysterious FET destruction on high-power H bridge
« Reply #10 on: June 21, 2019, 06:08:09 pm »
We do have a ACS781LL ±100A hall effect sensor in the motor path as well.
However, the data from that is not currently used as a break input,

Here's your problem. (You can, of course, have other problems as well, but this is the most probable primary cause.)

IMHO, this pulse-by-pulse limit should be the first thing verified before applying actual power.

Quote
just as feedback to the control system

A very well tuned feedback controlling a PWM may be able to protect the devices, but it's almost unheard of that you could get the response tuned right from the start of prototyping, hence the need for pulse-by-pulse limiting.

Quote
- these FETs are rated at 80A continuous / 200A pulsed, which I had assumed would mean we could get away with switching a load from a 100A supply.

Your DC link cap bank can support current only limited by its ESR. It's likely an order of magnitude more than your nominal supply current (otherwise the cap bank wouldn't be very effective).

Using excessive FET ratings and doing without active current sense is a valid strategy in very small motor controllers (maybe a few watts), but anything bigger, and the cost of the FETs and their drivers becomes much more than the cost of the current sense.

Remember that the motor iron has some saturation current (assume 3 * Inominal if you have no exact information), after which the current rise rate increases and finally shoots up. In this case, energy stored in the DC link cap bank can supply, say, 1000 amperes quite easily, which again may be able to kill the FET in tens to hundreds of microseconds, within one or a few cycles. A feedback loop typically cannot react to this.

A bad way to deal with this is to add tons of control logic such as ramps, soft starts, all kinds of edge case detections, but you'll always have some untreated edge case. Hence, do finish the proper pulse-by-pulse current limiting; it's also easier and simpler to understand.

You may be able to replace the feedback loop completely with a peak current mode control scheme, in some cases it does the torque limiting for you just fine, in which case there's no need for two separate systems.

Quote
Is pulsed current failure consistent with the resulting shorted state of the FET?

Yes. Every other cause has the same result, though, so it's hard to say which it was. Basically, excessive Vds, excessive Vgs (in either direction!) - you should use a 500MHz scope to measure either -, or excessive power dissipation in fully or partially conducting is the cause - see the SOA curve (and remember that it's often rated at Tj = 25 degC, which is completely unrealistic).

Quote
Notably, the FET (package, at any rate) is not hot after failure - thermal camera reports at is only ~10-20°C above ambient.

The fact that they are not hot only proves that a small overload sustaining for a long time, causing slow but finally excessive heating, was not the probable cause. Local die heating can happen in microseconds (which is also why traditional fuses, or input supply current limiting before a capacitor bank, cannot protect semiconductors.) The amount of energy in such event may be very small, but enough to destroy the die (milligrams) or even hotspot a part of the die (micrograms worth of material). After this heat spreads to the package, the temperature increase is almost zero.

Quote
If you do think that this is the problem, we can restructure the board such that if the current goes above (say) 90A the comparator output from that inhibits the A/B motor signals.

This should always be the first thing you do and verify. I verify it by injecting a test voltage over the shunt (I simply discharge a capacitor through the shunt if I don't have large enough supply on hand!) or through the hall sensor, before actually applying the DC link voltage. If it works, I have excessive currents ruled out, and fewer reasons to blow fets during development. Blown FETs slow down the work, especially if they cause hidden damage to gate drivers and you fail to replace the gate drivers as well...

Quote
Thanks for the advice about the PWM frequency - we had been using 20kHz in a previous system, but had received advice from the only person we actually know in real life with motor driving experience, and they had suggested a much higher frequency. We'll revert that back down.

Going much over 20kHz might be advisable if dogs start complaining about the high-pitched noise, but even in that case, going over about 30-40kHz is not worth it. Seeing that EVs that typically run around or below 20kHz with a high but clearly audible whine don't cause much complaints, this isn't a usual issue.

100kHz itself isn't impossible to achieve, just hugely nonoptimal for such large motor drives. They have massive inductance so the ripple current is next to nothing even at lower frequencies. High switching frequency forces you to increase edge rates to have sensible switching losses, problematic for EMI. OTOH if you drop to 20kHz, you have reduced the switching loss to 20%, and may be able to slow down the edges more (bringing switching losses back up), or add more aggressive snubbers if EMI ever becomes a problem.
 
The following users thanked this post: Dubbie

Offline rschlaikjerTopic starter

  • Contributor
  • Posts: 10
  • Country: us
Re: Mysterious FET destruction on high-power H bridge
« Reply #11 on: June 21, 2019, 06:08:49 pm »
Quote
What diodes are in parallel with the FETs?  They appear to be schottky.

The parallel diodes are the ST1040STR: https://www.digikey.com/product-detail/en/smc-diode-solutions/ST1040STR/1655-1752-1-ND/6674461
They aren't overly beefy - only rated for 10A average recitified - but were added as a bit of a hail-mary to see if it made a difference.
The drain-source diode in the MCU80N06 is rated for 80A forward, which again seems like it ought to be capable of handling itself.

Quote
Do you know what the net series inductance ot the load is?

At 10khz test frequency, the LRC meter reports the motor as having 35.5µH of inductance and 7.87 ohms resistance.

Quote
C15 and C16 are also contributing to the peak current because they have to be charged and disharged every cycle.  Are they there for some sort of EMI reduction?

I'll be honest, I'm not 100% sure of their purpose - they are copied from the application schematic of the MC33883, page 18:



Following cur8xgo's advice, I will try and get some better traces of the gate voltages when driving back and forth on the lower-power supply and report back.

I appreciate all the advice so far!
 

Offline Siwastaja

  • Super Contributor
  • ***
  • Posts: 9336
  • Country: fi
Re: Mysterious FET destruction on high-power H bridge
« Reply #12 on: June 21, 2019, 06:09:05 pm »
By the way, haven't seen the layout. PCB design screenshot, or a photograph of the actual device. Hugely important.
 

Offline Siwastaja

  • Super Contributor
  • ***
  • Posts: 9336
  • Country: fi
Re: Mysterious FET destruction on high-power H bridge
« Reply #13 on: June 21, 2019, 06:12:20 pm »
Don't you think its would be odd for the fet to fail short from overcurrent? Unless its avalanche, shouldn't if fail open?

No, they typically fail short. Failing open isn't impossible, but a bit unusual. Of course, put enough current through it, and it physically vaporizes, and finally becomes open.
 
The following users thanked this post: Someone

Offline cur8xgo

  • Regular Contributor
  • *
  • Posts: 148
  • Country: us
Re: Mysterious FET destruction on high-power H bridge
« Reply #14 on: June 21, 2019, 06:16:27 pm »
Quote
Following cur8xgo's advice, I will try and get some better traces of the gate voltages when driving back and forth on the lower-power supply and report back.

To be clear:

Fet in avalanche could be killing it (Vds voltage transient)
Fet Vgs being exceeded could be killing it
Other things people have suggested could be killing it (basically overcurrent pulses besides avalanche..body diode/rdson/linear)

Accurate, direct, Vgs AND Vds measurements can rule out the Avalanche/Vgs mode of deaths..allowing you to isolate the problem to something else quite easily

Take your time making these measurements. Differential, only one probe connected, right across the pins, with short ground lead wound on probe, you may need to float the scope ground (yes not safe dont do this unless you are sure its okay). Need to get your trigger right..presumably put it in peak detect and watch things on the 40A supply so your FET's live through it. You should see something even if the fets are dying. Zoom in on the transient and see what you got.

I am not saying I am 100% sure its a Vgs or avalanche death. But you can pretty much rule both out if you do some high quality measurements.




 

Offline rschlaikjerTopic starter

  • Contributor
  • Posts: 10
  • Country: us
Re: Mysterious FET destruction on high-power H bridge
« Reply #15 on: June 21, 2019, 06:18:05 pm »
Quote
By the way, haven't seen the layout. PCB design screenshot, or a photograph of the actual device. Hugely important.

Of course!
Here are two pictures of the board in question - first focuses directly on the bridge & has copper pours visible, second gives a full overview with planes off for visibility.
I'm sure that there are plenty of newbie mistakes to be seen...



 

Offline Siwastaja

  • Super Contributor
  • ***
  • Posts: 9336
  • Country: fi
Re: Mysterious FET destruction on high-power H bridge
« Reply #16 on: June 21, 2019, 06:36:26 pm »
Fet in avalanche could be killing it (Vds voltage transient)

Yeah, my recommendation would be to completely avoid FET avalanching, even if they were avalanche rated, because the avalanche energy is difficult to measure exactly. Just scope with a 500MHz BW scope (100MHz is probably barely acceptable, leave a bit more margin in that case), and verify Vds never exceeds the Vdsmax rating, leave a bit (like 10-20%) of margin, remember to measure over the full operating condition range. Then, choosing avalanche rated FET works as a small extra safety margin.
 

Offline rschlaikjerTopic starter

  • Contributor
  • Posts: 10
  • Country: us
Re: Mysterious FET destruction on high-power H bridge
« Reply #17 on: June 21, 2019, 07:00:50 pm »
Quote
Just scope with a 500MHz BW scope (100MHz is probably barely acceptable, leave a bit more margin in that case)

Unfortunately the only scope we have on hand is a DS1054Z, which is... 50MHz. And stock probes.

Quote
Take your time making these measurements. Differential, only one probe connected, right across the pins, with short ground lead wound on probe, you may need to float the scope ground

We don't have any differential probes, if that's what you mean - open to suggestions for good ones though! Motor power supply output is floating with respect to scope earth, so no problems there.

Here are some initial measurements of the gate-source and drain-source voltages across Q1 during the reversing cycle - each file is named for the measurement, and the current limit of the supply. The probe method is as shown below - stock rigol probe with cap and alligator ground lead detached, ground wire soldered to board and wrapped around the ground tip on probe. None of the gate voltages appear to get close to the Vgs in the datasheet (±20V), but caveat that with our lackluster probe setup.

« Last Edit: June 21, 2019, 07:07:53 pm by rschlaikjer »
 

Offline Siwastaja

  • Super Contributor
  • ***
  • Posts: 9336
  • Country: fi
Re: Mysterious FET destruction on high-power H bridge
« Reply #18 on: June 21, 2019, 07:08:57 pm »
Unfortunately the only scope we have on hand is a DS1054Z, which is... 50MHz. And stock probes.

Run the riglol keygen to crack it to 100MHz :). The stock probes are good to 100MHz IIRC. Given your fairly big loop area, it's unlikely you have ringing over 100MHz, but it can be over 50MHz.

The layout doesn't look too bad, but spraying low-ESR ceramic caps around could be a good idea for EMI and to reduce the stress of the elcaps.

I wouldn't bother with the parallel diodes, reduce the deadtime if you want to reduce body diode losses. Use the area occupied by the diodes to add ceramic or high current film DC link caps.
« Last Edit: June 21, 2019, 07:12:04 pm by Siwastaja »
 

Offline cur8xgo

  • Regular Contributor
  • *
  • Posts: 148
  • Country: us
Re: Mysterious FET destruction on high-power H bridge
« Reply #19 on: June 21, 2019, 07:11:03 pm »
Fet in avalanche could be killing it (Vds voltage transient)

Yeah, my recommendation would be to completely avoid FET avalanching, even if they were avalanche rated, because the avalanche energy is difficult to measure exactly. Just scope with a 500MHz BW scope (100MHz is probably barely acceptable, leave a bit more margin in that case), and verify Vds never exceeds the Vdsmax rating, leave a bit (like 10-20%) of margin, remember to measure over the full operating condition range. Then, choosing avalanche rated FET works as a small extra safety margin.

Let me ask you this..as far as avalanche energy on an h-bridge. If one sees the fet is avalanching (Vds flat-topping significantly higher than rated), and we know the current level of the power rails, shouldn't it be straightforward to put an upper limit on what the avalanche energy could be? Length Vds > rated * current of power rails * avalanche voltage = energy? Since only an inductance can push the voltage up higher in order to breakdown the fet in the first place, we only need to look at the inductances in the system and what current level they were at before the switch. So supply bus inductance (100A max), motor current (100A max?)...I think anything else in the circuit will be less wont it?




 

Offline cur8xgo

  • Regular Contributor
  • *
  • Posts: 148
  • Country: us
Re: Mysterious FET destruction on high-power H bridge
« Reply #20 on: June 21, 2019, 07:24:42 pm »
Hmm those plots seem okay..Vgs near 15V but thats still below 20V.

Questions:

-Were you doing the "backdriving" thing during these plots?
-Is the scope capable of measuring very short transients? We are talking less than a couple uS..possibly much less.

For instance running the numbers...lets say the fet is avalanching at 70V and 100A for 1uS. Thats 7mw every time. If you are switching at 20khz, thats 140W dissipation.

If your scope at 2ms timebase wont show us transients that short, then the information to rule out or detect Vgs/Vds death isn't there.

You could possible put a very small diode with a low (but higher than supply voltage) reverse voltage across Vds and see if it blows.

Or possibly a diode + resistor + cap to integrate short transients over time and let you see them with your scope.

 

Offline cur8xgo

  • Regular Contributor
  • *
  • Posts: 148
  • Country: us
Re: Mysterious FET destruction on high-power H bridge
« Reply #21 on: June 21, 2019, 07:29:13 pm »
Or you could just set the timebase to 1uS and trigger on voltages higher than Vds...

Your scope should show something..at some point if you need huge scope bandwidth to see transients..they are so short it doesnt matter

 

Offline MagicSmoker

  • Super Contributor
  • ***
  • Posts: 1408
  • Country: us
Re: Mysterious FET destruction on high-power H bridge
« Reply #22 on: June 21, 2019, 07:34:17 pm »
We don't have any differential probes, if that's what you mean - open to suggestions for good ones though! Motor power supply output is floating with respect to scope earth, so no problems there.
...

Pintek makes decent differential probes that are inexpensive and rumor has it that they are the ones that everyone else copies.

Oh, and Siwastaja's comments have been spot-on; you'd do well to pay attention to everything he wrote.

 

Offline rschlaikjerTopic starter

  • Contributor
  • Posts: 10
  • Country: us
Re: Mysterious FET destruction on high-power H bridge
« Reply #23 on: June 21, 2019, 07:39:35 pm »
Quote
Were you doing the "backdriving" thing during these plots?

Yes, during these tests we are doing the same oscillatory driving behaviour.

Quote
Or you could just set the timebase to 1uS and trigger on voltages higher than Vds...

Tried this - with the 40A supply and a timebase of 1uS; the scope did not trigger on Vgs with a trigger level of 15V, and did not trigger for Vds with trigger level of 25V.
 

Offline jmelson

  • Super Contributor
  • ***
  • Posts: 2852
  • Country: us
Re: Mysterious FET destruction on high-power H bridge
« Reply #24 on: June 21, 2019, 07:42:07 pm »
You have no current limit!  You MUST limit the current, with a very fast control path, to prevent failure.

But, there may also be another way for failure to occur, depending on the design of the FET gate driver.
When one of the half-bridges is sourcing current to the motor (high-side transistor on) and then the high-side is turned off, the motor inductance will try to pull current from that side.  This will drive the junction of the high/low transistors below ground.  If a fast, low-resistance path is not available, this node can go MANY volts below ground, and that may destroy the gate driver chip.  The body diode in the FETs are not designed to handle this current.

I had to put in an ultra-fast diode across the low-side transistor to handle this current in servo drives I make.  I measured the motor terminal node going to -12V for aver one us without the body diode turning on at all!  In your case, these are D8 and D15.  How fast are they to turn on?  You need something that can turn on in 10s of ns.  I use the ES3D, but in your application, you probably need one with more forward current rating.

Jon
« Last Edit: June 21, 2019, 07:58:40 pm by jmelson »
 


Share me

Digg  Facebook  SlashDot  Delicious  Technorati  Twitter  Google  Yahoo
Smf