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Mysterious FET destruction on high-power H bridge
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rschlaikjer:

--- Quote ---By the way, haven't seen the layout. PCB design screenshot, or a photograph of the actual device. Hugely important.
--- End quote ---

Of course!
Here are two pictures of the board in question - first focuses directly on the bridge & has copper pours visible, second gives a full overview with planes off for visibility.
I'm sure that there are plenty of newbie mistakes to be seen...



Siwastaja:

--- Quote from: cur8xgo on June 21, 2019, 06:16:27 pm ---Fet in avalanche could be killing it (Vds voltage transient)

--- End quote ---

Yeah, my recommendation would be to completely avoid FET avalanching, even if they were avalanche rated, because the avalanche energy is difficult to measure exactly. Just scope with a 500MHz BW scope (100MHz is probably barely acceptable, leave a bit more margin in that case), and verify Vds never exceeds the Vdsmax rating, leave a bit (like 10-20%) of margin, remember to measure over the full operating condition range. Then, choosing avalanche rated FET works as a small extra safety margin.
rschlaikjer:

--- Quote ---Just scope with a 500MHz BW scope (100MHz is probably barely acceptable, leave a bit more margin in that case)
--- End quote ---

Unfortunately the only scope we have on hand is a DS1054Z, which is... 50MHz. And stock probes.


--- Quote ---Take your time making these measurements. Differential, only one probe connected, right across the pins, with short ground lead wound on probe, you may need to float the scope ground
--- End quote ---

We don't have any differential probes, if that's what you mean - open to suggestions for good ones though! Motor power supply output is floating with respect to scope earth, so no problems there.

Here are some initial measurements of the gate-source and drain-source voltages across Q1 during the reversing cycle - each file is named for the measurement, and the current limit of the supply. The probe method is as shown below - stock rigol probe with cap and alligator ground lead detached, ground wire soldered to board and wrapped around the ground tip on probe. None of the gate voltages appear to get close to the Vgs in the datasheet (±20V), but caveat that with our lackluster probe setup.

Siwastaja:

--- Quote from: rschlaikjer on June 21, 2019, 07:00:50 pm ---Unfortunately the only scope we have on hand is a DS1054Z, which is... 50MHz. And stock probes.

--- End quote ---

Run the riglol keygen to crack it to 100MHz :). The stock probes are good to 100MHz IIRC. Given your fairly big loop area, it's unlikely you have ringing over 100MHz, but it can be over 50MHz.

The layout doesn't look too bad, but spraying low-ESR ceramic caps around could be a good idea for EMI and to reduce the stress of the elcaps.

I wouldn't bother with the parallel diodes, reduce the deadtime if you want to reduce body diode losses. Use the area occupied by the diodes to add ceramic or high current film DC link caps.
cur8xgo:

--- Quote from: Siwastaja on June 21, 2019, 06:36:26 pm ---
--- Quote from: cur8xgo on June 21, 2019, 06:16:27 pm ---Fet in avalanche could be killing it (Vds voltage transient)

--- End quote ---

Yeah, my recommendation would be to completely avoid FET avalanching, even if they were avalanche rated, because the avalanche energy is difficult to measure exactly. Just scope with a 500MHz BW scope (100MHz is probably barely acceptable, leave a bit more margin in that case), and verify Vds never exceeds the Vdsmax rating, leave a bit (like 10-20%) of margin, remember to measure over the full operating condition range. Then, choosing avalanche rated FET works as a small extra safety margin.

--- End quote ---

Let me ask you this..as far as avalanche energy on an h-bridge. If one sees the fet is avalanching (Vds flat-topping significantly higher than rated), and we know the current level of the power rails, shouldn't it be straightforward to put an upper limit on what the avalanche energy could be? Length Vds > rated * current of power rails * avalanche voltage = energy? Since only an inductance can push the voltage up higher in order to breakdown the fet in the first place, we only need to look at the inductances in the system and what current level they were at before the switch. So supply bus inductance (100A max), motor current (100A max?)...I think anything else in the circuit will be less wont it?




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