Hi,
I want to use this NAND flash chip, which has a capacity of 64Gbit. *(datasheet
http://pdf.datasheet.live/e35a5359/micron.com/MT29F64G08CBABBWP-12%3AB.pdf)
On the pinout, I have two chip enable PINs (CE#/CE2#) :

This chip has two dies inside the same package, but I technically only have one NAND_CE pin on my MCU (I don't have two).
I wonder if anybody being familiar with NAND interfacing knows if it's doable to tie both chip enable (CE) PINs with a logic gate, so that if one needs to be enabled, both will always be enabled at the same time.
Is the chip somewhat using the chip enable PIN as an "extra addressing bit" so that we cannot really enable both because the addressing will become confused (i.e. if both dies have the same 00h-FFh addresse ranges or something like that), or is it doable to have one PIN driving the two chip selects with logic glue.
Thanks!