Electronics > Projects, Designs, and Technical Stuff
[Solved] NanoVNA says impedance of my 3200R resistor is 542R-1250X at 50 MHz
ogden:
--- Quote from: hendorog on October 21, 2019, 09:32:31 pm ---A symmetric component is a special case of a two port component. In the case of a perfectly symmetric component and fixture then I agree with you - you don't need to reverse the DUT.
--- End quote ---
Good. If we talk about reversal, then SOLT-calibration of the *fixture* both ways (on S11+S21 VNA) could possibly increase de-embedding precision (of the fixture). This potentially will increase precision of DUT impedance measurements which as we (at last) agreed, do not need to be reversed.
hendorog:
--- Quote from: ogden on October 21, 2019, 10:26:22 pm ---
--- Quote from: hendorog on October 21, 2019, 09:32:31 pm ---A symmetric component is a special case of a two port component. In the case of a perfectly symmetric component and fixture then I agree with you - you don't need to reverse the DUT.
--- End quote ---
Good. If we talk about reversal, then SOLT-calibration of the *fixture* both ways (on S11+S21 VNA) could possibly increase de-embedding precision (of the fixture). This potentially will increase precision of DUT impedance measurements which as we (at last) agreed, do not need to be reversed.
--- End quote ---
Good.
Now that we have got past that.
The issue I have been talking about here is how to correct for the load match error in the nano. And of course how much it matters.
ogden:
--- Quote from: hendorog on October 22, 2019, 12:01:51 am ---The issue I have been talking about here is how to correct for the load match error in the nano.
--- End quote ---
Yes, you are talking about that - I noticed. We can continue. As you already learned, reversal of the DUT won't help in our case of symmetric component impedance measurements. What remains - nothing much actually. Psuedo-Full Correction (FakeFlip) you linked seems like possible solution to improve something here, yet article does not cover details. You are welcome to explain how it works and what could be actual improvements using FakeFlip calibration.
One thing for sure that can be improved - return loss of NanoVNA ports. Currently RL of Port2 is kinda poor (to say it politely): @299MHz it improves from -28dB (48.1+j3.1 Ohm) to -48dB (49.9+j0.4 Ohm) by adding quality 50Ohm 10dB matching pad. Port1 matching can be inferior as well. Disclaimer: I talk about NanoVNA I have which is black *clone* with no shields.
hendorog:
--- Quote from: ogden on October 23, 2019, 12:03:26 pm ---
--- Quote from: hendorog on October 22, 2019, 12:01:51 am ---The issue I have been talking about here is how to correct for the load match error in the nano.
--- End quote ---
Yes, you are talking about that - I noticed. We can continue. As you already learned, reversal of the DUT won't help in our case of symmetric component impedance measurements. What remains - nothing much actually. Psuedo-Full Correction (FakeFlip) you linked seems like possible solution to improve something here, yet article does not cover details. You are welcome to explain how it works and what could be actual improvements using FakeFlip calibration.
One thing for sure that can be improved - return loss of NanoVNA ports. Currently RL of Port2 is kinda poor (to say it politely): @299MHz it improves from -28dB (48.1+j3.1 Ohm) to -48dB (49.9+j0.4 Ohm) by adding quality 50Ohm 10dB matching pad. Port1 matching can be inferior as well. Disclaimer: I talk about NanoVNA I have which is black *clone* with no shields.
--- End quote ---
Excellent, there is no need to proceed any further in that case.
ogden:
--- Quote from: hendorog on October 23, 2019, 08:27:24 pm ---Excellent, there is no need to proceed any further in that case.
--- End quote ---
Why don't you explain how FakeFlip works.
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