Do discrete MOSFET transistors contain ESD protection?

[zapta]

Digital MOSFET ICS do contain ESD protection in form of clamping diodes.

What about discrete transistors such as the one below? Do they also contain ESD protection? If so, does it effect the operation/model of the transistor (e.g. negative VGS is clamped)? If not, does it make them *terribly* sensitive to ESD?

http://www.diodes.com/datasheets/ds31838.pdf

[c4757p]

Not unless they specify that they do. Most discrete MOSFETs are only MOSFETs. And yes, the gates are quite sensitive. That one specifies V_GS(max) at +/- 8V; you're likely to punch straight through the gate oxide without much more than double that, or less if they were optimistic.

[T3sl4co1l]

I've heard of breakdown more like 5x rating, but yeah, you can wheeze right by there with kV+ of ESD, no problemo.

There are kinds with internal zeners, which are usually as small as possible, only good for a few kV HBM.

FYI, not all digital ICs contain protection diodes (or enough of them to matter).  I think CD4007 (essentially a MOSFET array) omits them.

Tim

[Marco]

I've seen some horror stories about the levels of care required to reliably assemble PCBs with 2n7002s, can't find the post now but he didn't get returns down to a decent level until he started wearing an ESD apron on top of the normal precautions.

[Nerull]

I've worked on a product which consisted of a simple PID controller PWMing 4 logic-level mosfets to regulate temperature of a heating element. They had set up a spray booth to apply conformal coating to the boards, and hadn't used an ESD-safe curtain on the booth. Those mosfets failed closed circuit at an alarming rate.

[nctnico]

IMHO it helps to put a 10k pull-down resistor on the gate of a MOSFET. That at least prevents building up a charge on the gate.

[Christopher]

10k at 12v is pissing away just over a milliamp.. I've used 100k to 1M before to keep the gate pulled low

This won't do anything for esd though, will it

[T3sl4co1l]

If anything, ESD might jump the resistor as a spark gap, but not after kV have been applied to the rest of the circuit.  So, no.  Bleeders or pull-downs/ups are good practice anyway, and typically required for function (you don't want floating connections, ever).

Tim

[zapta]

If anything, ESD might jump the resistor as a spark gap, but not after kV have been applied to the rest of the circuit.  So, no.  Bleeders or pull-downs/ups are good practice anyway, and typically required for function (you don't want floating connections, ever).

Tim

If the gate is driven directly by an MCU, does the protection diodes of the MCU also protect Vgs ?

[Circlotron]

I did some tests on about five 600V 3 ohm TO-220 mosfets about 15 years ago. The gates would pop at around 45vdc.

[T3sl4co1l]

If anything, ESD might jump the resistor as a spark gap, but not after kV have been applied to the rest of the circuit.  So, no.  Bleeders or pull-downs/ups are good practice anyway, and typically required for function (you don't want floating connections, ever).

Tim

If the gate is driven directly by an MCU, does the protection diodes of the MCU also protect Vgs ?

If they are close by, and there's no series resistor, perhaps.  But why are you having ESD exposed to an internal trace?

Tim

[juanfermed]

As c4757p, they do not contain any ESD protection unless it is stated. And even when stated, it does not mean the ESD protection is suitable for your real world application.

For example, some ICs and MOSFETs stated a HBM -Human Body Model- and CDM "Charged Device Model" in the range of 400 - 2.5kV. These parameters imply mostly only that the device can/will survive assembly during production be it on its own assembly line or your final production assembly line (if the assembly line complies with proper ESD regulations).

If a device is ESD protected or provides any kind of ESD protection for the real world, it will for sure state it and even use it as advertising, since its a feature that not all devices have. The reason for this is that good ESD protection usually requires more silicon and thus area, making it more expensive. A person can rise a charge of up to 35kV just by walking on a carpet.

 Dont be confused in the MCU datasheets when it states "I/O lines ESD protected" as it might only imply that I/O lines are protected for production ESD levels, and not real world. I might be wrong, but a device has ESD protection designed for real world when it is fully characterized in the datasheet.

Please refer to the following documents and links for more details:
[1]http://powerelectronics.com/regulators/selecting-protection-devices-tvs-diodes-vs-metal-oxide-varistors
[2]https://www.esda.org/about-esd/esd-fundamentals/part-1-an-introduction-to-esd/

[zapta]

Dont be confused in the MCU datasheets when it states "I/O lines ESD protected" as it might only imply that I/O lines are protected for production ESD levels, and not real world. I might be wrong, but a device has ESD protection designed for real world when it is fully characterized in the datasheet.

I should have clarified that, my question was about handling the part before assembly, not operation in the field.