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No I2C DMA on a general purpose 32bit MCU?

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RoadRunner:
Right now I am trying to interface few sensors chips to PIC32MX. I will be transferring 20K to 30K bytes every second from sensor to CPU.

Problem is, I am operating I2C in interrupt mode and there are many other tasks also running in system , which may generate interrupt at any point. This causes I2C bus to hang(SDA or SCL pulled low till I power cycle sensor).

I can not disable interrupt during I2C ISR because other interrupts have higher priority.

I2C controller with these PIC32MX mcu appear to be not supporting dma, I looked around same class ARM chips, there I2C controller also do not support DMA. I think i2c having many states (i.e. start ,addr, ack/nack, restart , data,ack/nack ,stop) is the reason why getting DMA working is complicated and only reserve for little higher end I2C controller. I have used many CPU from nxp LPC series , there also I2C does have DMA and I2C does not work properly until unless you set interrupt priority to highest

I have looked around , few expensive chips (other than PIC32) have really smart I2C controller, which can accept commands , like read byte , write byte , start stop ack/nack and every thing else done automatically, these I2C controller seems to be supporting DMA.

It would be nice if few people share there experience with I2C transmitting/receiving  large amount of data. while not being highest priority task and (maybe not lone task).

AndyC_772:
It's not at all obvious to me that an interrupt during an I2C transfer should cause the bus to hang. There's a maximum speed, but you can run it as slow as you like, and can pause at any time.

The bus will hang (stuck low) if a receiving device misses a clock edge, and the master and slave end up out of sync.

Is it possible that some other ISR is accessing registers that are involved with the I2C interface?

Scope the I2C bus, and capture the last few transactions before the bus hangs. What does the last successful transfer look like? What happens when it hangs?

I think you have a logical problem here, which isn't inherently anything to do with interrupt priority. Nothing in an I2C master ever needs to be done immediately.

dmills:
I2C is **Hated** around here because it is easy to get it to mostly sort of work, and a complete bastard to get it to work really reliably.

I especially like the 'stuck bus because you hit restart in the debugger at just the wrong time' one, but there are many, many ways to break it.

I think you probably can get the PIC32 to do DMA to the I2C peripheral, but I am not sure you would want to, I2C being as dog slow as it is and all and DMA not being particularly good about transactions that involve significant software state machines without much messing about with chained transfers.

My bet is you have something else going on.

Now if anyone knows why my PIC32 DMA based SPI driver can only work with one port at a time (Yes I am using different pairs of DMA cores for each bus) I would love some ideas.

Regards, Dan.

SiliconWizard:
On STM32's, DMA transfers are supported with I2C.

JPortici:
I would try to find out what the REAL problem is.
I've never had an I2C bus hanging because an interrupt happened inside another interrupt, on PIC32MX or any other MCU i encountered.

Anyway I also hate I2C with passion as i need a state machine inside a state machine to do even the simplest things in a non-blocking fashion, and also because bus collision.
It's usually easy to recover from the condition, but then your software has to be much more complicated to support resuming/retry operation

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