I'm starting work on a project involving wireless digital audio transmission (hopefully using very the cheap and simple NRF24L01), and I've come across what could potentially be a bit of a snag.
If my ADC at one end is running off it's own internal clock, then the micro recieves the data, turns it into packets and sends it via the NRF24L01 to another micro, and outputs it to a DAC and an S/PDIF interface (obviously on a separate clock), won't the (even very slight) mismatch in clock frequency cause an issue?
Obviously I'll need some size of buffer, but if the ADC is clocked faster this will fill up and the output will lag behind, and if it's clocked slower the DAC on the output end will run out of data to convert.
It seems to me that clock synchronisation using these modules is out of the question, so I'm wondering if there's any way to fix this issue without using a different system for wireless transmission?
My only ideas so far are either: bin a few packets here and there to make sure the buffer is always the size it should be, or modify the sample clock slightly in response to buffer capacity. Neither of these seem like real solutions.
I thought this would be a fairly trivial task, as all I need to do is read a sample, transmit it, then send it to an ADC at the other end, but it seems to be getting a bit complicated.
Hopefully my thoughts make at least some sense and I can find a solution to this, Merry Christmas all!