using deadbug construction makes a very low leakage S&H
Actually, I really need a peak detector, not just a S&H; unless, that is, if there is a way of determining when the maximum in the waveform occurs, in order to open the switch off the S&H at that particular moment.
One could consider a solution with a single OP and a JFET as buffer amplifier
I eventually got it to work...sort of; using an Analog Devices AD8656ARMZ, which is foot compatible to the OPA2388. So it does work, but the error is unacceptable high. So I conclued that it is probably better to go and use to different opamps, as you suggest above. As I determined it with my experience in this circuit so far, the characteristics required for these to opamps are:
- first opamp in the chain (the one charging the cap) must not necessarily be a CMOS /JFET input one, but it must have:
- low offset voltage
- extremely good slew rate
- high output current
- RRIO (my input signal range is some 0...4.5V)
- second opamp in the chain must definitely be a CMOS / JFET input one and it must have:
- low input bias current
- lowest possible phase shift; this is actually critical. Every bit of phase shift will result in a delay in the feedback loop which essentially delays the first opamp to "sample" the input signal and recharge the capacitor; actually, this is a big problem I have, because I am not sure how to infer the phase shift of an opamp at Gain=1 from the information available in the datasheet. Most datasheets provide a graph with the phase shift in open loop conditions.
- RRIO
Best regards,
Cristian