OK, so having understood why the schematic in the original post is not functioning correctly, I decided to revert to the original schematic, which was a bit more complicated, "not working" and which I wanted to simplify. As the simplification is obviously flawed, I am back to square one, and I attached the schematic of the original, unmodified circuit, to this reply (Schematic.pdf).
This one has indeed the feedback at the 1st opamp taken from the output of the second opamp, through a 20k resistor, and it also has the additional diode (D331) which helps the 1st opamp not to saturate.
It also has a MOSFET through which I reset the charge on the capacitor.
As can be seen in the attached screenshot, I get some weird behavior, with the output of the overall circuit peaking, but not always at the correct value (see Fig1.png). I am also a bit uneasy about the oscillations at the OPAMP_OUT node during the time the capacitor is held in RESET (uC_PEAK_RST is HIGH), but I suppose these are due to the limited output current capability of the opamp, which would like to be HIGH but cannot source that much current permanently through the 10Ohm resistor and through the RESET mosfet. So while not really liking these oscillations, I am not sure if it is actually related to the output not peaking at the right value when uC_PEAK_RST goes LOW, or if that is due to some other limitation of the opamp. I have also attached some more close-up screenshots of what is happening with the OPAMP_OUT node when uC_PEAK_RST goes LOW (Fig2.png, Fig3.png, Fig4.png).
As a side note, I must say I had an earlier version of this circuit, based on the ADA4891-2 opamp from Analog Devices, which was working. I was unhappy with the offset voltage rating of that opamp (10mV), and I wanted to change to something better. I had originally selected the ADA4891-2 based on its extremely low input bias current to minimize storage capacitor voltage decay, but it seems it is difficult to find opamps with such low bias current and low offset rating. Anyway, I realized that it is most likely not the opamp input bias current which is the dominant leakage path, as it is a couple of order of magnitudes compared to the leakage current through the reset mosfet (I was using the 2N7002 as a reset MOSFET back then). So I changed the opamp to the current Texas Instruments OPA2388, which also has a reasonable low input bias current, but a much, much better offset voltage; I have also changed the reset mosfet to the smallest leakage one I could find (PMZB600UNELYL). Yet, it seems the change is working against me. I still have some samples of the ADA4891-2 around, but they are SOIC footprint and do not match the footprint on my current board (I have selected the OPA2388 in VSSOP footprint). However, I suppose I can order some ADA4891-2 in a VSSOP compatible footprint version and give it a go in the current circuit. But I am really put off by its large offset voltage, and I would really like to make somehow the current schematic work.
Of course, there is the possibility to change the opamp to an even third alternative, but unless I cannot pinpoint what is wrong with the current OPA2388, there are no guarantees I might not be running in the same issues with a new one.
There fore...help!
Best regards,
Cristian