This took me a few hours but it had to be done

So what we've got here? The input stage is as we know it, the active loads turn out to be Darlington pairs. Precision is precision, I suppose. Followers Q9,Q10 drive the second stage and Q9 also drives the 1st stage load - this has been nicely simplified in the newer OPA827 according to the datasheet.

Lots of capacitors are sprinkled all over the area, mostly bypassing BE junctions of various transistors. Not sure what C3,C4 are doing but likely stabilizing the loop involving Q5~Q9. The actual compensation capacitors are C5,C6 - the segmented ones. We can guess what OPA637 looks like.

The second stage and output buffer are essentially as drawn in the datasheet. Curiously, Q19,Q20 have the same area as the outputs and Q21~Q23 shift their BE voltages exactly, so the output seems to run on equal bias as each branch of the second stage, even slightly less due to R18,R19

R21,J5 and the associated circuitry is the bias generator. J6,Q26,Q27 appear to be the patented circuit they call "noise free cascode". The mirror multiplies J6 current 16 times, reducing die area required for J6. Q30~Q35 looks like a "high feedback" mirror trying to accurately match Q35 current to J5 current. Q36,Q37 is a cascode current source that biases the input stage, Q38~Q41 bootstrap input JFET drains, as we know.

All she wrote

I'm still don't know what's the point of J3,J4 instead of doing it as drawn in the datasheet and in LM101A. Maybe one day. Indeed, the main point of this whole exercise was to find out how exactly they bias the input stage and whether some deeper trickery is involved. Apparently not, it's just a current source feeding the bases of Q1~Q4.