Opamps - Die pictures

[exe]

If we believe the IEEE paper the effective leakage of the protection diodes is quite high with 50fA. Somehow that doesn't fit with the 2fA bias current. 

Could it be that the upper diode sources 50fA current, and lower one sinks 50fA, making it 50fA-50fA=0fA? (if they are matched)

[Noopy]

If we believe the IEEE paper the effective leakage of the protection diodes is quite high with 50fA. Somehow that doesn't fit with the 2fA bias current. 

Could it be that the upper diode sources 50fA current, and lower one sinks 50fA, making it 50fA-50fA=0fA? (if they are matched)

It doesn´t sound like that:
"The input bias and input offset currents that result from these protection diodes are dominated by the upper diodes which consistently outleak the bottom diodes causing the bias current to always exit the pins. This current is exceptionally low and typically only 50fA at room temperature (even less in plastic)."

I have no explanation for that... 

[T3sl4co1l]

In general, diode leakages won't balance; it also depends on voltage so you'd expect an open input to hover somewhere between VDD/VSS, probably a couple diode drops off one or the other rail since the leakage changes fastest (read: lowest dynamic resistance) near zero.  And the middle value (at halfway between VDD/VSS) will be +/-(Ileak minus a little bit).

Evidently the diodes here are asymmetrical, so that that balance condition never happens.  Geometry? Doping? Who knows..  They don't look very different here so it's maybe not geometry, but your eyes are better trained at this than me.

Tim

[magic]

Current cancellation tricks can normally be detected by measuring shot noise, which adds rather than cancels, but here bias current is much too low for that. If the two currents are a few fA each and the difference between them is 2fA which becomes the externally visible Ib, then it would take several TΩ of input series resistance to easily detect noise current above Johnson noise of the resistor (if I got the math right).

The "diodes" are said to be transistors. Probably like this:

Code: [Select]

IN+ ---- P               P ---+
|    N - N -- VCC -- N - N    |
|    P - P -- GND -- P - P    |
+--- N               N ---- IN-

According to Monticelli, protection circuit is supposed to become an SCR when overvoltage appears across the two inputs with the chip out of circuit. This is what should happen here: the pins are clamped together without developing much GND-VCC voltage. I think

The transistors are of different polarity so their BE junctions necessarily have different design and properties. I suppose the NPN may be a substrate NPN, while the PNP may be a lateral PNP with substrate base and two concentric P implants for emitter and collector.

Looking closely at Zeptobars LMC6001 image one can see that the two structures are slightly different; the lower one has some sort of line going through the middle of the purple ring.

[magic]

If we believe the IEEE paper the effective leakage of the protection diodes is quite high with 50fA. Somehow that doesn't fit with the 2fA bias current. 

Could it be that the upper diode sources 50fA current, and lower one sinks 50fA, making it 50fA-50fA=0fA? (if they are matched)

Probably not because the spec has been revised.

Monticelli says 50fA.
Early datasheets say 40fA.
Post 1990 datasheets say 2fA.

 

[David Hess]

Evidently the diodes here are asymmetrical, so that that balance condition never happens.  Geometry? Doping? Who knows..  They don't look very different here so it's maybe not geometry, but your eyes are better trained at this than me.

They do not use actual diodes even though they are available on the IC process.  Bipolar transistor junctions are used because they have much lower leakage and higher conductance, yielding much higher impedance at low voltages.

[Noopy]

If we believe the IEEE paper the effective leakage of the protection diodes is quite high with 50fA. Somehow that doesn't fit with the 2fA bias current. 

Could it be that the upper diode sources 50fA current, and lower one sinks 50fA, making it 50fA-50fA=0fA? (if they are matched)

Probably not because the spec has been revised.

Monticelli says 50fA.
Early datasheets say 40fA.
Post 1990 datasheets say 2fA.

 

It sounds like Monticelli wasn´t able to get lower than 50fA (perhaps he wasn´t able to meassure lower currents) and later they realized they can specify 2fA (perhaps with a better process or just with better measurement equipment).

Remember the problems Bob Pease had with measuring extremly low input bias currents...

[Noopy]

The OP284 is a dual opamp with a rail-to-rail input and a rail-to-rail output. The supply can be selected between 3V and 36V. At 5V the OP284 draws a maximum of 1,45mA. The bias current of the bipolar input transistors is typically 60nA. The maximum offset voltage is 65µV in the best bin. The datasheet specifies the slewrate as 2,4V/µs and the bandwidth as 3,5MHz. In addition to the OP284, a device with one (OP184) and a device with four opamps (OP484) are available.




The circuit diagram in the datasheet shows how a rail-to-rail input is usually built. To understand the circuit, it´s useful to mark the relevant blocks with different colors. There are two inverse input stages at the input. The cyan differential amplifier (R3/R4/Q3/Q4/QB3) works up to a common mode voltage equal to the positive supply voltage. If the common mode voltage drops to the negative supply, the green differential amplifier (R1/R2/Q1/Q2/QB6) takes over. QL1 and QL2 (gray) are protection structures that limit the voltage at the input.

The bias currents of opamps with rail-to-rail input stages are often discontinuous and not infrequently subject to strong component scatter. This complicates the compensation in the application. The OP284 datasheet specifies a largely linear relationship between the common-mode voltage and the bias current. However, the impression is deceptive, since a common mode voltage range of -15V to 15V is shown there. About 1V before the voltage limits, the slope of the curve changes very strongly, because one of the differential amplifiers stops working there. With a voltage range of 30V, the 1V wide marginal areas do not appear too critical. With a supply voltage of 3V, however, this characteristic is much more problematic.

The differential amplifiers are followed by a so-called compound folded cascode gain stage. In this stage, the transistors Q7/Q8 and Q5/Q6 each represent a cascode circuit. The outputs of the two differential amplifiers are combined in this section too. This is followed by the driver stage for the output (red), in which transistor Q10 works together with current sink QB7. Unusual are the four transistors Q11/Q12/Q9/Q10 (yellow), whose function is not directly obvious. 

In the left area the reference current for the current mirrors is generated, which are used for biasing.

The output stage has a PNP transistor in the highside path and a NPN transistor in the lowside path, so that the output potential can be controlled almost to the supply potentials. The only limiting factor here is the saturation voltage of the output stage transistors, which is specified in the OP284 as 20mV for the lowside and 100mV for the highside. In the output stage block there is the capacitor CC2 for bandwidth limiting and the capacitor CFF, which realizes a feed forward control. At the lowside transistor the capacitor CO between base and collector reduces the tendency of oscillations.




The chip above, which is still marked as a PMI component and dates back to 1995, was lost during the final cleaning, which is why just this non-optimal image is available.

In the lower left area, there is the abbreviation PMI and the letter sequences JRB and DSC, which could be abbreviations of the engineers. In the lower right corner, you can already see the logo of Analog Devices. Analog Devices bought PMI in 1990. Below that, the year 1994 was recorded. At the upper edge, a typical PMI designation is found with the string 1446Z. Z stands for the first revision.




The revision 0 of the datasheet shows the metal layer of the OP284. According to this, the dimensions are 2,34mm x 1,65mm and contains 62 transistors. If you would double the schematic above, you would get 64 transistors. This indicates that the two integrated opamps share the reference current generator.




The metal layer of the OP484 with four opamps is shown in the datasheet too. This variant apparently was designed one year later. The die is 2,79mm x 2,03mm and contains 120 transistors. The designation is 1447Z.




This OP284 dates from 1997 and already shows the Analog Devices logo.




The die is protected with a gel potting, which was used in the upper OP284 too.




It turns out that this OP284 already contains revision Y, i.e. the second revision of the opamp. There are no obvious functional differences to the first revision. Most noticeable are slightly different spacing of the metal layer at the large capacitors. Perhaps the mask set just needed to be adapted to new production lines.

The die is very symmetrical, but not completely symmetrical. The two opamps are mirrored on the vertical axis, but the inputs are on the lower left and upper right to represent the usual pinning for a dual opamp. It is interesting to note that the resistors located directly at the inputs are present at the bottom for both opamps. Likewise, two input resistors have been integrated just above the center of the die twice. I assume that this is not just a reservation to place the two inputs at the lower edge. Apparently one wanted to keep the structures under the metal layer maximally symmetrical.

The die was laser tuned. This can be seen in the typical resistor geometries and the square test structure at the top left. The resistor pairs with the bulges are used to match the offset of the doubled input amplifiers. In the center, where the reference of the biasing circuits is located, a small network of resistors is integrated, which can be used for tuning too.

The input transistors and the protection diodes are located in the center of the die. The output stages are integrated on the horizontal axis at the edges, so that their heat dissipation affects the branches of the differential amplifiers as evenly as possible and does not create thermal drift effects.

It turns out that the capacitors have a somewhat more complex structure than shown in the schematic. In the large capacitor block, whose lower electrode is connected to the output, in addition to the two known capacitors CO and CC2 there is a not connected spare capacitor. Another capacitor represents an additional capacitor connected to the emitter of transistor Q15. This measure inhibits oscillation of the highside transistor. The capacitor CFF, which is used for feed forward, is located in the upper area of the die and consists of two surfaces. The second surface is connected to the emitter of transistor Q15 and acts as a feed forward path too.


https://www.richis-lab.de/Opamp63.htm

 

[magic]

Unusual are the four transistors Q11/Q12/Q9/Q10 (yellow), whose function is not directly obvious. 

Same story as OP283.

Q9 is a driver for Q5,Q6 and Q10 drives Q18.

Q11,Q12 may initially look pointless, but I think they are there for base current compensation. If Q10 base current increases due to base current of Q18, Q11 base current increases (almost) the same. Then Q5,Q6 current decreases the same and thus Q8 provides the necessary base current into Q10, without the input stage needing to do (almost) anything. This should increase open loop gain under heavy loading and reduce input offset voltage (and drift) due to mismatch in Q9,Q10 quiescent currents. Q12 works the same way for Q9.

[magic]

No one noticed that these are vertical PNPs, fabricated in isolation islands biased to VCC.
Looks like OP283 was made the same way, but I didn't see it then.
 

Not sure how they managed to break the usual (for bipolar) 3:1 ratio between bandwidth in MHz and slew rate in V/μs.
Unlike OP283, this one doesn't have emitter degeneration. (Now you know why I noticed those weird PNPs).

[Kleinstein]

The open loop gain and phase curves look a bit unusual. There are different values for the GBW product depending on which frequency range to look at. When looking at the low freuquency end one gets a considerably larger GBW product and thus about the usual ratio.  The 2 (NPN and PNP)  input stages and how the compensation is done seems to be causing this somewhat inusual reponse.

[Noopy]

Unusual are the four transistors Q11/Q12/Q9/Q10 (yellow), whose function is not directly obvious. 

Same story as OP283.

Q9 is a driver for Q5,Q6 and Q10 drives Q18.

Q11,Q12 may initially look pointless, but I think they are there for base current compensation. If Q10 base current increases due to base current of Q18, Q11 base current increases (almost) the same. Then Q5,Q6 current decreases the same and thus Q8 provides the necessary base current into Q10, without the input stage needing to do (almost) anything. This should increase open loop gain under heavy loading and reduce input offset voltage (and drift) due to mismatch in Q9,Q10 quiescent currents. Q12 works the same way for Q9.

Indeed, we had the same questions with the OP283, quite a long time ago... 
In the OP284 it´s even a little more puzzling but your explanations back then and today sound reasonable.


Regarding GBW and slewrate: These feedforward and compensation capacitors possible do some strange things to the behaviour at different frequencies. 

[Noopy]

This is an easy one: Siemens TAA521, another 709 variant.








It can be seen that the design of the die is almost exactly the same as in the National Semiconductor LM709 from 1969 (https://www.richis-lab.de/Opamp54.htm). The metal layer shows just small, non-functional differences in some places. On the left side you can find the characters 709F as in the LM709 from National Semiconductor.


https://www.richis-lab.de/Opamp64.htm

 

[Noopy]

Finally I managed to update the AMP01. It was one of my first projects and first I had just "normal" pictures just showing the metal layer. I wrote A LOT of words around the pictures but that didn´t compensate the lack of information. Since the AMP01 is a really nice part it deserves better pictures and explanations:






The AMP01 is an instrumentation amplifier developed by Precision Monolithics, which still costs over 30€ today and is now distributed by Analog Devices.

The datasheet specifies a maximum offset voltage of 50µV. The temperature drift is a maximum of 0,3µV/°C. The bias current remains below 4nA. The amplification factor can be selected between 0,1 and 10.000. With a gain factor of 1.000, the linearity is sufficient for an accuracy of 16Bit. The datasheet specifies a common mode rejection of at least 125dB. An output level of up to +/-10V is regulated with up to +/-50mA. A maximum of +/-13V is possible. Capacitive loads of up to 1µF are also permissible. For a gain factor of 1.000, the datasheet specifies a -3dB bandwidth of typically 26kHz. The slew rate is 4,5V/µs (G=10). The settling time is 50µs (G=1000, 20V, +/-0,01%).




The datasheet of the AMP01 contains a block diagram that shows how the amplifier works. In the centre there are two balanced amplifier branches that process the input signals. The amplification factor of this differential amplifier and thus of the entire component can be adjusted via the resistance between the branches. This is called "cross degeneration" or "pi degeneration".

The two branches are supplied by two current sources. Two current sinks are located at the lower ends of the differential amplifier branches. Both pairs of current sources can be adjusted independently of each other, thus enabling the offset voltages at the input and output of the AMP01 to be balanced. According to the datasheet, the current ratio above the input transistors can be used to compensate for the offset voltage at the input, which is then multiplied by the amplification factor. It is noticeable that the circuit diagram just represents reality in a very simplified way. Here, the upper current sources would just influence the offset voltage at the output. The set amplification factor would have no influence.

With the current ratio below the input transistors, one can compensate the offset voltage at the output. A different current ratio leads to a current flow across the resistor Rs, which in its main function defines the strength of the sense feedback. This also makes it possible to adjust the offset voltage at the output.

For gain factors above 50, the datasheet recommends adjusting the offset voltage at the input. For amplification factors below 50, however, the offset voltage at the output should be adjusted, as this is initially higher if the amplification factor is left out. If you want to adjust both offset sources, start with a short-circuited resistor Rg at the input offset, then remove the short-circuit and adjust the output offset.

Below the input transistors there are two additional transistors that influence the signals in the branches. On the right side is the sense potential, which is connected directly to the output or, in the case of four-wire connection, to the actual destination point of the output signal. Since the AMP01 can drive relatively high currents, such feedback of the output signal is quite useful. The transistor in the left path is controlled by the reference pin. This potential can be connected directly to the local ground or, with four-wire connection, to the reference potential at the destination point.

The levels of the sense and reference potentials are adjusted via voltage dividers that are integrated on the chip. This means that no particularly constant resistors are required externally. There is usually hardly any voltage at the reference input, but an identical voltage divider has been integrated on this side as well. This design ensures the best possible symmetry. Temperature drifts have the same effect on both sides and compensate each other. This is another advantage of integration on the chip. Both voltage dividers thus have very similar temperatures. The operational amplifiers between the voltage dividers and the differential amplifier branches ensure that the high-impedance voltage dividers are not loaded.

A resistor is to be connected to the contacts Rs, which acts as an emitter resistor like Rg, but is assigned to the transistors above it in the feedback paths. Like Rg, Rs represents a local negative feedback. However, since the local negative feedback at Rs relates to the global negative feedback, Rg and Rs have an inverse effect. A low resistance Rg results in a high amplification factor. A low resistance Rs provides a low amplification factor. The opposite influence on the amplification has the positive side effect that thermal drifts of the resistors at least partially compensate each other.

There is a buffer amplifier at the output of the differential amplifier. On the one hand, this prevents the load at the output of the differential amplifier from having a negative effect on its specifications. On the other hand, the buffer amplifier also makes it possible to connect higher loads to the instrumentation amplifier. This can be a 50Ohm system, but it can also just be a longer transmission line with a large parasitic capacitance.




The datasheet shows the metallisation layer of the instrumentation amplifier. The dimensions of the die are therefore 2,82mm × 3,78mm.




The present die corresponds pretty much exactly to the representation in the datasheet.




1411 is the internal designation of the circuit. The W indicates the revision. In the case of PMI, this was done by counting up from Z in the direction of A. This is therefore the fourth revision.

The character string 6A1 stands for the mask of the metal layer. On the right edge of the dies are the abbreviations of eight other masks.






The design dates back to 1987. GBW and DFB are probably abbreviations of the developers involved. Two patents mentioned in the datasheet belong to Derek F. Bowers.




On the upper edge, the masks depict eight small squares. Next to them is an integrated symbol that cannot be assigned.




At first glance, the layout of the die appears confusing, but the critical circuit parts are arranged very advantageously. The majority of the critical elements are integrated symmetrically around the horizontal axis in the center of the device. If the output stage on the far right heats up, the differential paths experience a similar temperature change and drift defects compensate to a large extent.




The AMP01 offers two supply interfaces. One interface supplies only the output stage (yellow/green). The other interface supplies the remaining circuit parts (red/blue).




The input transistors are positioned with their input resistors on the far left (white). The protection diodes are positioned a little to the top. The feedback control transistors (blue) connect the input transistors to the current sinks (pink). The current sinks themselves are in the middle of the die. At the lower edge, an adjustment takes place during production. In addition, the potentials that enable an external adjustment intervene here.

The current sources that supply the input transistors are located between the input transistors and the current sinks (red). Again, there are circuit parts for an adjustment during production and the intervention for an adjustment in the later application. Both are located in the upper left corner of the die. However, it is not the current source that is influenced there, but more or less current sinks connected in parallel.

The input transistors are protected from voltage fluctuations at the collector by a cascode circuit (orange). This part of the circuit is not shown in the datasheet. It is located between the input transistors (white) and the current sources (red).

The coupling of the signals to the output amplifier (cyan) is done from the circuit part that do the input current compensation. The input current compensation is located in the lower left corner and takes up quite a large area (black). The circuit feeds the necessary base currents into the inputs of the instrumentation amplifier. The compensation circuit works with two current sources placed further to the right, one of which can be adjusted via a test pad. According to the circuitry, the strength of the compensation can be adjusted here.




If we record the circuit of the large differential amplifier, we get the circuit diagram shown here. There are many more current sources and sinks in the circuit than shown in the datasheet. They do biasing in many places.

As expected, the offset voltage at the input is not adjusted directly at the current sources ViosNULL. The two current sinks ViosNULL are located above the input transistors and the two current sinks IQ1/IQ2 are integrated below. To adjust the offset, the current ratio of these pairs is changed. Changes have an inverse effect on ViosNULL and IQ1/IQ2. Ultimately, the input offset is influenced via the current sinks IQ1/IQ2, whose differential current flows through the resistor Rg. The current sinks ViosNULL ensure that the current ratio in the upper area isnot excessively influenced.




The design and characteristics of the input amplifier are described in more detail in patent US4471321. This patent is mentioned in the datasheet of the AMP01. The circuit fulfils two important tasks in addition to the basic function of a differential amplifier. It ensures that the potentials at the input transistors change as little as possible and that the external circuitry is loaded as little as possible by the input currents.

The cascode circuit in the immediate vicinity of the input transistors fixes their collector-emitter voltage and thus ensures strong common-mode rejection (I4/Q8/Q7/Q9 and I5/Q11/Q10/Q12).

In the right-hand section, the input circuit is shown a second time. In the centre are two SuperBeta transistors (Q14/Q15), as they are also used at the inputs of the AMP01 (Q1/Q2). In this connection, they draw a base current that corresponds to the base current of the input transistors. It does not have to be the absolute same current value, but the ratio of the currents has to be the same. Necessary amplification factors can be set by the following current mirrors. The bias cancellation thus ensures that a current is fed into the inputs of the AMP01 that corresponds fairly exactly to the base current of the input transistors. This ensures that the circuit at the inputs of the AMP01 is not loaded with the base currents.




The two input transistors Q1 and Q2 are each divided into two areas arranged crosswise so that temperature gradients affect both branches of the differential amplifier as equally as possible.

The external resistor Rg, which also determines the amplification factor, is connected with two bondwires. Since Rg may have quite a small value, special care must be taken to ensure that the influence of the connection lines and thus also of the bondwires remain as small as possible.


[...]

[Noopy]

The transistors of the two large current sources and the two large current sinks are also doubled and cross-connected. In addition, the two circuit parts are located on the horizontal symmetry axis of the die. This guarantees that thermal gradients also affect the two branches of the differential amplifier as evenly as possible.

The lines leading from the emitter resistors of the current sinks to the ground potential contain meanders, so that they also represent as equal resistances as possible. A closer look reveals that equal lengths were also taken into account for the supply lines of the current sources.




To adjust the current sinks of the large differential amplifier, there are additional emitter resistors connected in parallel at the lower edge of the die. These can be connected via fuses and thus enable the current sinks to be adjusted during production. One branch offers four fuses for this purpose, the other one offers one. The user has access to these emitter resistors via the Voos NULL contacts and can further adjust the remaining offset in his circuit.




In the upper left corner of the die are some smaller current sinks which, in addition to the biasing, are used to adjust the offset voltage at the input. Like the large current sinks, the current sinks for offset adjustment can be adjusted during production via fuses and later offer the user an adjustment option via the ViosNULL contacts. Here, one path contains three fuses and the other one contains one fuse.




The Darlington transistors in the cascode circuit have a very large collector area. On the right, it serves as the supply line for the current sources and on the left, the signal is coupled out for bias cancellation and to the output opamp A1.




In the lower left corner of the die there is the bias cancellation circuit. You can clearly see the two large transistors that are similar on the input transistors, which are supposed to reproduce the electrical conditions at the inputs as well as possible.




Smaller current sources are integrated below the large current sources and current sinks. They supply the cascode circuit, the bias cancellation and the input stages of the operational amplifiers A2 and A3.




The datasheet of the AMP01 refers, among other things, to patent US4503381, from which the above circuit diagram is taken. It shows a large current mirror with two outlets. Also drawn are the leakage currents IL, which can be relatively high with the usual lateral PNP transistors. Especially when the current mirrors are to deliver small currents, these are strongly distorted by the leakage currents.

The upper transistor row (Q3/Q2/Q1) represents the actual current mirror for the reference current of transistor Q7. Transistor Q8 carries the base currents of Q1/Q2/Q3, so that these do not reduce the reference current. The lower transistor row (Q6/Q5/Q4) shields the current mirror from potential fluctuations, which increases the internal resistances of the current sources.

As a new feature, the patent describes the transistors Q10/Q11, which are designed to compensate for leakage currents in the current mirror. Since the base currents of transistors Q10 and Q11 are represented by their respective leakage currents, the collector currents contain a temperature drift that is proportional to these leakage currents. This ensures that the currents fed into the current mirror correspond to some extent to the leakage currents there.




The current mirror in the AMP01 contains the cascode transistors described in the patent above, but the leakage current compensation has not been implemented. The resistors allow different currents to be set for the individual branches.

The reference current, on which the currents of the current sources are based, is generated with a bandgap reference (not in the picture). It is interesting to note that the first current source (Q3/Q4) feeds into the reference path. Apparently, the operating current of the bandgap reference is generated here too.




In the case of the operational amplifiers A2 and A3, an attempt was made to arrange the sensitive circuit parts in such a way that thermal gradients on the die have as little effect as possible on the signals.

The voltage dividers are located in the immediate vicinity of the power amp transistors, but they are arranged axisymmetrically around the horizontal axis. Since the circuit is electrically symmetrical too, drift effects are largely compensated.

The input transistors of the operational amplifiers A2 and A3 are located next to the voltage dividers. Here the geometric and electrical symmetry ensure low thermal drift too.

Current sources, current sinks and the middle amplifier stage have to do their job with less optimal positions from the point of view of possible temperature drifts. The output stage transistors of the operational amplifiers A2 and A3 are then again optimally symmetrically placed at the corners of the input transistors.




The resistance ratio of 1:19 can be clearly seen in the voltage dividers. The lowest resistor consists of two elements, one of which is bridged. It seems that there is a possibility to adjust the resistance ratio to 2:19.

Dummy structures are integrated above and below the voltage dividers (green). These structures usually ensure that the manufacturing process affects the outer and inner resistors as equally as possible. The area in which the resistors are embedded is massively connected to the potential V+ (blue). This contact is not exclusive, as it also supplies the output stage next to it.

Between the common base of the two voltage dividers and the potential V- is a large diode, which is not shown in the circuit diagram (cyan). The purpose of this diode remains unclear. Perhaps the temperature drift of the forward voltage should compensate another temperature drift.

To the left of the resistors, the input transistors of the operational amplifiers A2 and A3 are integrated (white). The four transistors are connected crosswise in parallel as usual. Although they are functionally just two transistors, they are the input transistors for both differential amplifiers. Each transistor has a current source in the collector path under which the output signal is tapped. The feedback from the large differential amplifier is connected to the base. The voltage dividers, via which the sense and reference potentials are supplied, are located at the emitter.




The individual circuit parts of the operational amplifier A1 are distributed over the surface of the die. The large output stage is located on the right edge of the die.




The large NPN transistors of the output stage are clearly visible. Also clearly visible are the current limiters. Among the remaining components in this area must be the overtemperature protection too.




The many current sources and sinks take up a considerable area on the die. In addition, there is a large reference voltage source in the upper right corner (yellow) and a special test circuit in the lower right corner (green).




In the area where the reference voltage or the reference current is generated, the transistor constellation typical for a bandgap reference is particularly noticeable (yellow arrows). One transistor is surrounded by a second transistor divided into two blocks. The outer transistor has an emitter area four times as large. The emitter paths contain the typical resistor constellation.






In the lower right corner there is a test circuit that has been given a surprising amount of space. It is connected to the test pin of the AMP01.

On the far left of the picture, four transistors generate four currents that are proportional to the currents of the large current source and current sink pairs. These currents are duplicated in four current mirrors and fed to a circuit with four large Darlington transistors.




Normally, the test pin is not connected, which means that the collectors of the Darlington transistors are open. In this state, just the current of the upstream current mirrors flows through the circuit. The Darlington circuit suggests that this current is very low, probably hardly relevant. Consequently, the circuit only becomes active when a supply voltage is applied to the test pin.

Surprisingly, the outputs of the four Darlington transistors feed into the lowest ranges of the resistors, which belong to the lower current sinks of the large differential amplifier. Consequently, the test circuit can actively influence the current sinks. Even more surprising is the linking of the signals. The potential of the left current sink influences the left current sink. The right current sink, however, is not only influenced by the right current sink, but also by the two upper current sources of the large differential amplifier.

Also surprising are the different values of the emitter resistors. The ratio 2:4:8:1 can be easily estimated from the geometries. The Z-diodes in parallel with these resistors limit the current flow to the emitter resistors of the lower large current sinks above a certain level. The different resistance values provide for different current limits.

Everything indicates that this test circuit is used to adjust the current sources and current sinks or to check the grade of the adjustment at the end of production. Since the test potential is applied to a pin, it can be assumed that the circuit is designed to be activated again after integration into the housing. The exact mode of operation remains unclear.


https://www.richis-lab.de/IC_05.htm

 

[Noopy]

The AMD AM685 is a fast comparator that switches with a delay of just 6,5ns. With a latch input you can fix the current state, which is advantageous when used in ADCs. In the Soviet Union the AM685 was reproduced as КP597CA1. You can find the КP597CA1 here: https://www.richis-lab.de/Opamp25.htm




The datasheet contains a detailed circuit diagram.








The dimensions of the die are 1,3mm x 0,8mm. The AMD logo is depicted on the lower edge. The arrangement of the individual elements has been carefully thought out. You can find more details on the site of the КP597CA1.




The КP597CA1 is clearly modeled after the AM685. The die of the КP597CA1 is just a little bigger because the bondpads have been moved further out and some test structures have been integrated in the outer area.


https://www.richis-lab.de/Opamp65.htm

 

[iMo]

@Noopy: I've been waiting on your book "The World of Chips in Colors", hopefully it will come out soon.. 

[Noopy]

@Noopy: I've been waiting on your book "The World of Chips in Colors", hopefully it will come out soon.. 

Sounds very good! 

[T3sl4co1l]

Huh, Q5/Q6 for positive feedback?  Not rated for any hysteresis though... I wonder if Q17/Q18 emitter impedance is simply low enough not to do it (enhancing loop gain without causing hysteresis)?  They're certainly biased strongly, Q12 (Q9/Q10 in turn, depending on latch) dominates over Q11 (input diff bias).  Which makes sense for the twist-connected Q7/Q8, but I'm not sure about Q5/Q6.

D5-D8 seem to be mislabeled zeners; or maybe schottky in the process give equivalently useful breakdown voltage?

Tim

[Noopy]

Yeah that positive feedback looks strange. Well it´s no opamp. 

I would say D5-D8 are normal zener symbols. OK, not the less angular type but I know the "90° zener" too.

[T3sl4co1l]

Hmm, they probably are different, huh.  But that's a very poorly printable distinction; in fact D4 has suffered such a printing (or scanning) error.

Curious to use such awful symbols when they've done the one thing, avoid 4-way junctions.

Tim

[edavid]

The design dates back to 1987. GBW and DFB are probably abbreviations of the developers involved. Two patents mentioned in the datasheet belong to Derek F. Bowers.

GBW is the late Garth Wilson, one of the founders of PMI.  Oddly enough he left PMI and went on to work on EPROMs at AMD and microprocessors at Intel.  I worked with him briefly at Intel, but to my disappointment I was never able to get him talking about his PMI (or Fairchild) days.

[Noopy]

Hmm, they probably are different, huh.  But that's a very poorly printable distinction; in fact D4 has suffered such a printing (or scanning) error.

Curious to use such awful symbols when they've done the one thing, avoid 4-way junctions.

Tim

D4? No, i think that one is ok, it´s a Schottky. 

GBW is the late Garth Wilson, one of the founders of PMI.  Oddly enough he left PMI and went on to work on EPROMs at AMD and microprocessors at Intel.  I worked with him briefly at Intel, but to my disappointment I was never able to get him talking about his PMI (or Fairchild) days.

Thank you for this information. Very interesting! 

[Noopy]

Hey there are the diodes D1/D2 in the transistors Q3/Q4 but they are not connected! Interesting...


https://www.richis-lab.de/Opamp65.htm#D1D2

 

[Noopy]

Do you remember the NE5534? Some of my first pictures, so the quality is... Well... 

https://www.richis-lab.de/Opamp01.htm






The NE5532 is a dual opamp based on the NE5534. However, they are not exactly the same opamps. The NE5534 needs an external compensation capacitor if you want to use it with a gain smaller than 3. The NE5532, on the other hand, is already fully compensated internally. However, this also reduces the slewrate from 13V/µs to 9V/µs. The small signal bandwidth is specified as 10MHz for both variants, but the power bandwidth decreases from 200kHz to 140kHz. The DC voltage gain is reduced from 100V/mV to 50V/mV, that shows that not only the internal capacitance have been increased in the NE5534, but also the gain factor has been reduced.




The datasheet of the NE5532 contains a detailed circuit diagram, which has been provided here with designators and colored for a better understanding. The input stage is represented by a common differential amplifier (yellow). The capacitor C1 limits the frequency band. There are two diodes at the inputs to protect against high voltages. In contrast to the NE5534, the NE5532 offers no possibility to externally adjust the offset voltage.

The current sink T3 is part of a bias network (blue). The core is a so-called "self-biased current reference" with transistors T4-T7. The transistors T6 and T7 have different sizes. Thus, as in a bandgap reference, a voltage with a small, positive temperature coefficient can be obtained at resistor R6. The resistor itself also has a positive temperature coefficient, so that the temperature coefficients largely compensate each other in the generated current. The reference voltage source is supplied by the current mirror T4/T5. The reference current is mirrored back into the reference circuit and is used as power supply. This ensures that Vcc fluctuations do not affect the reference current. The circuit R7/R8/D3 ensures a clean start-up.

The input amplifier is followed by another differential amplifier stage (green). Here no voltage amplification takes place yet. The transistors T8 and T9 work against the current mirror T11/T12. T10 ensures that the left path is not loaded with the base currents of the current mirror. A second emitter additionally feeds a current into the right path, which compensates there the base current of the following amplifier stage. Capacitor C2 allows a current to flow from the yellow amplifier stage into the right path of the green amplifier during rapid signal changes, thus providing feedforward. C3 and C4 form compensation capacitors which limit the frequency response of the opamp.

The green amplifier stage is followed by a driver stage (pink) before the transistors T17 and T19 represent the final stage (red). Only in this amplifier stage the voltage amplification of the NE5532 takes place (so that is not unique for the LMC662). A defined voltage drops at block D4/R15/T15 (gray), which provides a certain quiescent current in the output stage. The output stage has an overcurrent protection (cyan), which directly diverts the base current of the highside transistor. If an overcurrent occurs in the lowside transistor, the control of the driver transistor T13 is withdrawn via the current mirror T18/T22.

The transistor T16 seems to prevent saturation effects. If the voltage at the collector of T17 drops too far, T16 becomes conductive and consequently reduces the modulation of T13 and thus also of T17.




The die is located relatively far off-center in the package.

On the die the two opamps are completely isolated from each other except for the substrate. Accordingly, two bondwires lead from each supply pin to the die.






The dimensions of the die are 3,0mm x 2,2mm. The division into two parts without an electrical connection is clearly visible. A relatively large area is taken up by the large capacitors.




The development of the NE5534 and its variants can be traced back to Signetics. Signetics was acquired by Philips in 1975. It is therefore not surprising that there is a Signetics design in this device. This can be seen in the auxiliary structures for monitoring the manufacturing process, which can be found in the same form in other Signetics circuits, such as the NE5534 or the NE555 (https://www.richis-lab.de/555_6.htm). The string 6663A is a typical Signetics internal project designation too.

The illustration of the revisions of the seven masks shows that the metal layer was revised once.




The integrated circuit largely corresponds to the schematic in the datasheet.

For each opamp there are three free bondpads. These are the contacts which allow an adjustment of the offset voltage and an increase of the compensation capacitor of the NE5534 and the NE5533. Most likely, the same design with an adapted metal layer is used there.




On top of the resistors R1/R2 there is a metal surface which can be seen in NE5534 too. The metal surface is connected to the positive supply. It appears that the parasitic capacitance is used here.

The resistors R1/R2 and R9/10 provide a tuning option on one side. By moving the contacts to the metal layer one can adjust the offset voltage of the first two amplifier stages.

In the upper part of the first differential amplifier there is a significant difference to the schematic. Between the collector resistors R1/R2 and the positive supply two series connected diodes are integrated (DR). The purpose of these diodes remains unclear. These diodes are not integrated in the NE5534.




The resistor R8 in the start-up circuit is a JFET according to the structures. The NE5532 datasheet from Texas Instruments contains a circuit diagram that is almost completely similar to the circuit diagram from Signetics. However, a JFET is actually drawn in place of the resistor R8.

The circuit R15/D4/T15, which realizes the quiescent current setting of the output stage, shows an interesting structure. The emitter area of the transistor T15 and the diode D4 are conspicuously large.

Also interesting is the transistor T3. With its three emitter areas it is ensured that the current density is similar to the current density in the reference transistor T6, which ensures a very similar behavior and thus a constant current flow through the input amplifier.




The emitter resistors R3 and R6 of the current sinks T3 and T6 are integrated directly next to each other. The resistor R3 is designed somewhat larger with a series connection. The current mirror T4/T5 is located with the output stage on the horizontal axis of the die. Temperature gradients caused by the output stage thus have a very similar effect on the two transistors.




The Philips and Signetics datasheets do not specify the capacities of the NE5532 in detail. The Texas Instruments NE5532 datasheet contains capacity values too. It can be assumed that the capacitances at Signetics are at least similar. Accordingly, the values are 100pF, 40pF, 12pF and 7pF. The value of C3 was obviously adjusted via the metal layer.

It is interesting that the 100pF capacitor C1 is just minimally larger than the 40pF capacitor C2. This is due to the fact that capacitor C2 consists of two electrodes. In capacitor C1, the base surface forms one electrode (red), while above it the metal layer with the emitter surface and below it the collector surface form the other electrode. The metal layer and the collector surface are connected both at the upper edge (cyan) and twice in the middle of the surface (blue). This results in a much larger capacitance per unit area, although this is voltage dependent.


https://www.richis-lab.de/Opamp66.htm