Opamps - Die pictures

[Noopy]

Today as we know the circuit it´s just a little strange but think about the mastermind that first thought about this possibility! Chapeau!

[magic]

Have you ever shot a chopper opamp?

zeptobars: Microchip MCP6V27 - auto-zero opamp

This is the only example I have seen so far. Based on what's known about auto-zero opamps in general, the four blocks of identical circuitry in the center might be two pairs of opamps (it's a dual) taking turns nulling themselves and each other and storing the correction voltages in capacitors, which is what the large white areas probably are. But hell knows if that's exactly how this chip works and there is still some unexplained per-channel circuitry on the right and some common circuitry on the left.

You can also see that modern low voltage CMOS is densely packed and not so easy to read, even at a fairly high resolution. Maybe LTC1050 would be more friendly in this regard. Or something really old, like ICL7650.

I haven't seen a modern TI chip yet.

Unfortunately you won´t see very much. These modern opamps look a lot like a microcontroller: a lot of metal and nothing active to see. 

Which ones? Were they CMOS (no surprise) or are the bipolar ones equally bad now? I hoped bipolar would look similar to LM4562...

[RoGeorge]

Tektronix used the idea at least as early as 1979 in their 7A29 vertical amplifier, although I do not understand why.

My guess is because the same amplifier has a much higher bandwidth when used with current feedback.  With CF, the output voltage swing is close to zero at all times, so the voltage slew rate becomes almost irrelevant.

Another aspect is that current swings happens without any delays in all the nodes at once (except the speed of light delays, of course), while voltage swing is delayed because of all the internal capacitances that need to be charged in order to swing the voltage of a node.

Any parasitic inductances would delay a current swing propagation through nodes, too, similar with how capacitances would delay a voltage swing.  In practice, however, the inductances are so small that the effect of parasitic inductances upon current swing delays is neglijible, when compared with the effect on parasitic capacitances upon voltage swing delays.  That is why, the same amplifier when used with current feedback, should give a much higher cutting frequency (bandwidth) than when it's used with voltage feedback.  Or at least that's how I understood it while reading about current feedback.

[David Hess]

Tektronix used the idea at least as early as 1979 in their 7A29 vertical amplifier, although I do not understand why.

My guess is because the same amplifier has a much higher bandwidth when used with current feedback.  With CF, the output voltage swing is close to zero at all times, so the voltage slew rate becomes almost irrelevant.

Another aspect is that current swings happens without any delays in all the nodes at once (except the speed of light delays, of course), while voltage swing is delayed because of all the internal capacitances that need to be charged in order to swing the voltage of a node.

Any parasitic inductances would delay a current swing propagation through nodes, too, similar with how capacitances would delay a voltage swing.  In practice, however, the inductances are so small that the effect of parasitic inductances upon current swing delays is neglijible, when compared with the effect on parasitic capacitances upon voltage swing delays.  That is why, the same amplifier when used with current feedback, should give a much higher cutting frequency (bandwidth) than when it's used with voltage feedback.  Or at least that's how I understood it while reading about current feedback.

As far as I can tell in the application, there is no need for high speed.  The power inputs into the diode bridge are even decoupled with 22 microfarad capacitors.

[Noopy]

You can also see that modern low voltage CMOS is densely packed and not so easy to read, even at a fairly high resolution. Maybe LTC1050 would be more friendly in this regard. Or something really old, like ICL7650.

The LTC1050 luckily shows it´s details.

I haven't seen a modern TI chip yet.

Unfortunately you won´t see very much. These modern opamps look a lot like a microcontroller: a lot of metal and nothing active to see. 

Which ones? Were they CMOS (no surprise) or are the bipolar ones equally bad now? I hoped bipolar would look similar to LM4562...

On the surface of the OP2140 you just see some metal grids. 

[iMo]

Have you ever shot a chopper opamp?

zeptobars: Microchip MCP6V27 - auto-zero opamp

This is the only example I have seen so far..

That is not linear analog technology anymore .. Compared to the traditional opamps it is perhaps 1000x more complex structure..

[Kleinstein]

The modern AZ amplifier use quite complicated circuits and quite fine density CMOS, that may well no longer be visible with a normal optical microscope.

[Noopy]

I agree with iMo:
That´s no longer linear analog technology!
That´s evil witchcraft out of the dungeons of digital technology! 

 

[Noopy]

The LTC1051 contains two so-called zero-offset opamps. Originally, attempts were only made to optimise the offset voltage and offset drift of opamps with circuit technology and better semiconductor processes. In addition, there is often an adjustment during the manufacture of the components. Initially, only resistors were adjusted for this purpose. This was done either by trimming with a laser or by activating or deactivating resistors via fuses. Well you probably know all this.  Nowadays, some opamps contain memory that gets correction values during production and then does the offset correction in the circuit.

Zero-offset opamps, on the other hand, are constantly correcting their current offset. There are two techniques for this. Auto-zero opamps work according to a sample & hold principle in which offset voltages are determined cyclically and then used for correction. Chopper opamps modulate and demodulate the signal. In practice, switch groups at the input and output of the opamp usually exchange the signal crosswise. Correctly implemented, this compensates for the offset voltage. The real implementations are sometimes very different and there are also combinations of the two techniques. The terms are often mixed up or used incorrectly.

Zero-offset opamps offer exceptional offset values. They are usually also more robust against interference from the power supply. The challenges are the additional analogue switches in the signal path. Depending on the circuit, additional capacitors are required whose properties are critical. Depending on the concept, additional high-frequency interference occur in the switching frequency range. There can be mixed frequency products or the noise density increases at low frequencies.

The offset voltage of the LTC1051 is typically +/-0,5µV, maximum +/-5µV. The average temperature drift is typically specified as 0µV/°C and can be a maximum of +/-0,05µV/°C. To keep the noise as low as possible, zero-offset opamps often consume a little more supply current. For the LTC1051, 1mA per opamp is specified. The datasheet specifies the cut-off frequency as typically 2,5MHz. The maximum slew rate is 4V/µs.




The advert above was published in the magazine EDN in 1990. It shows the different variants of this opamp family. Here the opamps are referred to as "choppers". In the datasheet of the TLC1051, the categorisation is less clear, but a proximity to chopper opamps is always suggested. The TLC1052 is clearly labelled as a chopper opamp in its datasheet.




The datasheet for the TLC1051 does not contain any details on how it works. Sample & hold capacitors are mentioned repeatedly. As will be shown later, the architecture of the TLC1051 corresponds to the TLC1052, whose datasheet contains a block diagram. In the TLC1051, the capacitors Ca and Cb are only integrated, whereas in the TLC1502 they have to be added externally.

This shows that the TLC1051 is not a chopper amplifier but an auto-zero opamp. The signal does not undergo modulation and demodulation. Instead, the current offset value is stored in a capacitor and used for correction, while another capacitor holds the current value of the signal. In addition to the auto-zero path, the TLC1051 includes a parallel path for higher frequencies. This type of opamp is referred to as "auto-zero stabilised".

If the switches are in the position shown above, the inputs of amplifier gm1 are short-circuited. This amplifier usually has a high amplification factor so that it is sufficient to compensate its offset voltage. The capacitor Ca stores the value of the amplified offset voltage. In the second phase all switches are switched. The amplifier gm1 now processes the input signal. The output signal of the amplifier gm1 contains its amplified offset voltage. This offset voltage is stored in capacitor Ca and is subtracted via amplifier gm3. The amplified zero-offset signal is buffered via the amplifier gm2 and loaded into the capacitor Cb, the sampling capacitor. The amplifier gm4 is another buffer amplifier. Amplifier gm5 is the output buffer.

The signal must not contain any high frequency components. The sampling process generates mixed frequencies. If frequencies are fed in that are close to the sampling frequency, the mixed products are particularly annoying. The gm6 amplifier with capacitors C1 and C2 provides a parallel path for high frequency signal components and fulfils two tasks in this context. Firstly, the gm6 amplifier ensures that the LTC1051 can also process higher frequencies. At the same time, the high frequency path prevents the higher frequencies from reaching the sampling circuit. At high frequencies, a current flows through capacitor C1, reducing the input level at amplifier gm2 and thus the amplification factor of the auto-zero path.




The die is relatively large, measuring 3,4mm x 2,5mm. This image is available in higher resolution: https://www.richis-lab.de/images/Opamp/89x04XL.jpg




The design obviously dates back to 1997 and the revisions of eight masks can also be recognised. The fact that this opamp family was advertised as early as 1990 and the masks all have an A revision suggests that the design has been completely revised in the meantime.




The two opamps have a relatively symmetrical design. The capacitors, which have to be connected externally on the LTC1052, take up a large part of the area. The clock generator is integrated in the lower area of the die.

There are three unused bondpads in the lower area. These are additional options for connecting the supply potentials. The bondpad in the top left-hand corner is connected to a testpad via a fuse. What exactly this fuse could be used for remains unclear.






The circuit corresponds to the block diagram in the LTC1052 datasheet. The datasheet states that the amplification factors of the amplifiers gm1 and gm6 must be as equal as possible for proper function. Furthermore, these are the amplifier stages with the high amplification factors. Accordingly, these two sections are relatively large and have the same structure.




The large capacitors obviously consist of three layers in order to maximise capacitance.




The datasheet emphasises that capacitors C1 and C2 must be as identical as possible. For this reason, it is very surprising that there is a large MOSFET in parallel with capacitor C1, which only represents an additional capacitance. Perhaps this is intended to compensate for a parasitic capacitance at another point.




Four clock signals are generated in the clock generator. Two of these clock signals serve as the basis for generating the control signals for both opamps. The other two clock signals are not used, but are nevertheless routed to both opamps. The lines are then interrupted there. The transistors that would receive the alternative clock signals are connected to the supply potentials.

The control circuit consists of two very similar blocks that are connected in the centre. They generate a total of six control signals ("c"). The colours show which control signals have at least a similar phase. The switches with the letter "a" realise the upper switch position in relation to the block diagram.

At the input, the changeover switch S1 is doubled in order to represent an analogue switch that is as ideal as possible with PMOS and NMOS transistors connected in parallel. Switches S2 and S3 provide additional switches on the right and left which are not used. Obviously, some options have been kept open here in order to adapt the switching behaviour.




The clock generator is divided in two parts. The clock is generated on the right of the bondpad and processed on the left of the bondpad. The large capacitor on the left makes it possible to adjust the effective capacitance via the connections in the metal layer. This probably allows the duty cycle to be adjusted. This would be plausible, as a sufficient dead time must be maintained when throwing the switches.


https://www.richis-lab.de/Opamp85.htm

 

[magic]

Nice. This chip still looks quite simple for what it is doing.

This shows that the TLC1051 is not a chopper amplifier but an auto-zero opamp. The signal does not undergo modulation and demodulation. Instead, the current offset value is stored in a capacitor and used for correction, while another capacitor holds the current value of the signal. In addition to the auto-zero path, the TLC1051 includes a parallel path for higher frequencies. This type of opamp is referred to as "auto-zero stabilised".

They describe it as "chopper stabilized" in the datasheet. If you think about it, the part S1, gm1, gm2, S2 is a chopper amplifier: S1 chops the differential input voltage into a square wave, the linear transistors amplify the square wave, and S2 demodulates it back into DC by sampling the peaks. To avoid differential subtraction of peaks and valleys at this point, gm3 works as a DC servo of sorts and ensures that the valleys are fixed near some internal "ground" potential.

The output of the chopper feeds gm4 and gm5, which provide additional gain. And the whole chopper is bypassed at frequencies near the chopping frequency and above in order to reduce aliasing artifacts and achieve GBW much higher than the chopping frequency.

Of course the "auto zero" explanation about gm3 canceling gm1 offset voltage and a bunch of sample-and-hold circuits making it all work is valid too. I'm not sure what the difference between "chopper stabilized" and "auto zero" is supposed to be, and if there is any real difference at all. Maybe it's only marketing talk.

There are three unused bondpads in the lower area. These are additional options for connecting the supply potentials.

It's probably same thing as with MCP6024: two dual dice can be installed together to realize a quad. The top die gets its V+ in bottom left and V- in bottom right. The bottom die is rotated 180° so its supply connections are swapped.

I suppose it works out cheaper than designing a quad die and disabling half of it for the dual

The circuit corresponds to the block diagram in the LTC1052 datasheet. The datasheet states that the amplification factors of the amplifiers gm1 and gm6 must be as equal as possible for proper function. Furthermore, these are the amplifier stages with the high amplification factors. Accordingly, these two sections are relatively large and have the same structure.

These things look like ordinary PMOS differential pairs with PMOS current sources in the middle between gm1 and gm6 and NMOS current mirrors.

Hmm, how far are you from a complete transistor level schematic of this opamp?

[Noopy]

They describe it as "chopper stabilized" in the datasheet. If you think about it, the part S1, gm1, gm2, S2 is a chopper amplifier: S1 chops the differential input voltage into a square wave, the linear transistors amplify the square wave, and S2 demodulates it back into DC by sampling the peaks. To avoid differential subtraction of peaks and valleys at this point, gm3 works as a DC servo of sorts and ensures that the valleys are fixed near some internal "ground" potential.

The output of the chopper feeds gm4 and gm5, which provide additional gain. And the whole chopper is bypassed at frequencies near the chopping frequency and above in order to reduce aliasing artifacts and achieve GBW much higher than the chopping frequency.

Of course the "auto zero" explanation about gm3 canceling gm1 offset voltage and a bunch of sample-and-hold circuits making it all work is valid too. I'm not sure what the difference between "chopper stabilized" and "auto zero" is supposed to be, and if there is any real difference at all. Maybe it's only marketing talk.

I have read some articles and it seems that (today) it is common sense that "Auto Zero" is used for sampling circuits which meassure the offset and subtract it from the amplified signal. "Chopper" is used for for circuits that modulate and demodulate the signal and so loose the offset on the way. But the naming is mixed up a lot... 
You are right, the sampling circuit is somehow a modulation too but in my view it´s a lot more a sampling thing.

"Stabilized" (chopper or auto-zero) means that there is a high frequency path parallel (at least that is what the articles said I have read).

There are three unused bondpads in the lower area. These are additional options for connecting the supply potentials.

It's probably same thing as with MCP6024: two dual dice can be installed together to realize a quad. The top die gets its V+ in bottom left and V- in bottom right. The bottom die is rotated 180° so its supply connections are swapped.

I suppose it works out cheaper than designing a quad die and disabling half of it for the dual

A good explanation! 

The circuit corresponds to the block diagram in the LTC1052 datasheet. The datasheet states that the amplification factors of the amplifiers gm1 and gm6 must be as equal as possible for proper function. Furthermore, these are the amplifier stages with the high amplification factors. Accordingly, these two sections are relatively large and have the same structure.

These things look like ordinary PMOS differential pairs with PMOS current sources in the middle between gm1 and gm6 and NMOS current mirrors.

Hmm, how far are you from a complete transistor level schematic of this opamp?

The circuit is not very complex and the complete schematic would be near but I somehow don´t like MOSFETs... 

[David Hess]

It's probably same thing as with MCP6024: two dual dice can be installed together to realize a quad. The top die gets its V+ in bottom left and V- in bottom right. The bottom die is rotated 180° so its supply connections are swapped.

When I designed my super low noise DC differential amplifier, I deliberately used the LTC1151 dual because separate chopper stabilized amplifiers would run at slightly different frequencies creating the potential for beat frequencies.  Two separate dies are unlikely for this reason unless the clocks can be synchronized.  Some of the older single chopper-stabilized parts have a clock pin which can be used for synchronization to avoid this problem.

They describe it as "chopper stabilized" in the datasheet. If you think about it, the part S1, gm1, gm2, S2 is a chopper amplifier: S1 chops the differential input voltage into a square wave, the linear transistors amplify the square wave, and S2 demodulates it back into DC by sampling the peaks. To avoid differential subtraction of peaks and valleys at this point, gm3 works as a DC servo of sorts and ensures that the valleys are fixed near some internal "ground" potential.

The output of the chopper feeds gm4 and gm5, which provide additional gain. And the whole chopper is bypassed at frequencies near the chopping frequency and above in order to reduce aliasing artifacts and achieve GBW much higher than the chopping frequency.

Of course the "auto zero" explanation about gm3 canceling gm1 offset voltage and a bunch of sample-and-hold circuits making it all work is valid too. I'm not sure what the difference between "chopper stabilized" and "auto zero" is supposed to be, and if there is any real difference at all. Maybe it's only marketing talk.

I have read some articles and it seems that (today) it is common sense that "Auto Zero" is used for sampling circuits which meassure the offset and subtract it from the amplified signal. "Chopper" is used for for circuits that modulate and demodulate the signal and so loose the offset on the way. But the naming is mixed up a lot... 
You are right, the sampling circuit is somehow a modulation too but in my view it´s a lot more a sampling thing.

"Stabilized" (chopper or auto-zero) means that there is a high frequency path parallel (at least that is what the articles said I have read).

I gave up trying to figure out the difference between auto-zero and chopper-stabilized.  Descriptions from different manufacturers use different terms and contradict each other.

I think Linear Technology gave the best description for their chopper-stabilized parts.  The zeroing amplifier measures and corrects its own offset, and then measures and corrects the offset of the main amplifier.  One of the claimed features of their early parts is that they could be used in inverting or non-inverting mode, which I suspect was in response to true chopper amplifiers which could only be used in inverting mode.

[Noopy]

When I designed my super low noise DC differential amplifier, I deliberately used the LTC1151 dual because separate chopper stabilized amplifiers would run at slightly different frequencies creating the potential for beat frequencies.  Two separate dies are unlikely for this reason unless the clocks can be synchronized.  Some of the older single chopper-stabilized parts have a clock pin which can be used for synchronization to avoid this problem.

The LTC1052 has a clock pin to synchronise them. 

[magic]

The circuit is not very complex and the complete schematic would be near but I somehow don´t like MOSFETs... 

Well, CMOS is annoying, but 30 year old CMOS is doable.

Turns out the signal path circuitry is quite simple, a few differential pairs and current mirrors are all there is to it. Looks like a TLC274 chopped into pieces and reassembled semi-randomly. The trick is auto-zero witchcraft and high DC gain achieved by a sequence of four stages with unusual compensation by two Miller caps and two input pairs. BTW, similar compensation is shown in datasheets of modern three stage CMOS opamps from TI like OPA172 or OPA1656; they call it "active feedforward" and I have also seen it called a "multipath" elsewhere.

The critical pairs gm1 and gm6 use striped common centroid layout ABBAABBA and their mirrors are ABBA. The offset compensation pairs gm3 and gm4 are oriented perpendicularly to output stage heat gradient but don't bother with common centroid. The other small stage gm2 is single-ended and the output stage is a simple rail to rail contraption: M56 sinks load current directly, M51 steals current away from current mirrors driving M55. This arrangement ensures that M56 never turns off, so compensation keeps working when the output sources current.

M58 is a dummy transistor in parallel with C1 which appears to compensate for capacitance added to C2 by M56. It isn't exactly identical to M56, but they must have made it work somehow.

[Noopy]

Nice! Thank you very much! 
Would it be ok for you if I put your schematic on my website?

[iMo]

What I saw with my first 1050 (the one with the ext. clock input and built in caps) how easy it died. I operated it in my null meter (2x4.5Volt) and suddenly it got hot and died. It ended up in the trash can (so no sample for Noopy, a pity).

[magic]

Would it be ok for you if I put your schematic on my website?

OK

By the way, I forgot to mention that there is one error here which I am not going to correct because I'm too lazy to use the full, four-terminal MOSFET symbol.
In integrated CMOS technology the bodies are often tied to one of the supply rails, not necessarily to the source, and this appears to be the case here.

I noticed that IC designers often use simplified symbols similar to NPN/PNP which don't even show the body at all, unless they are doing something unusual with the body of one particular transistor. Maybe I should add these symbols to my LTspcie...

[Noopy]

 

That´s ok for me.
The "four terminal problem" is another reason why I don´t like drawing MOS schematics...