I agree. Lets do the math.
Even if you use the 64 pulse/rev variant, and put a spinner knob on it so you can twiddle it maybe up to 10 revs/s, its only going to give you 2560 edge events per second so you shouldn't have any problems as long as rise/fall times are of the order of 200us or better.
N.B. its life is specced at 30 RPM so its almost certainly unsuitable as a high speed shaft encoder. 10 revs/s is 600 RPM and even if the high speed doesn't drastically shorten its life, the non-detent version is only rated for 2000000 revs operating life, which you'd exceed in under 56 hours at that speed.
Consider a resistive divider of 82K upper and 150K lower resistors, driving an input capacitance of 50pF. That divider, worst case only needs 215uA of IOH so is fine driven by *ANY* TTL output and gives you a Theivenin equivalent resistance of approx 51K, and a time constant of 2.65us (which is a 5.8us risetime). That should be plenty fast enough if its being sampled by a MCU.
OTOH if you are using a fast hardware QEI module that has a sub us spec for maximum rise & fall times, you can still use a passive divider. The raw rise & fall times of the encoder are specced at 200ns, so there isn't much more than an order of magnitude improvement to be had. Dropping the divider resistors to 8K2 upper, 15K lower get you down to a time constant of 265ns, at the cost of a worst case IOH requirement of 2.15mA. If it craps out before you draw 2mA, a 470R pullup at the encoder output will fix that as it has plenty of IOL sinking capacity, but will be a power hog. Calculating the rise time when the time constant is comparable to the input waveform time constant is a PITA, so I simmed it in LTspice with .measure statements for the risetime and got 608ns.
If you *still* need faster edges stick a speedup capacitor across the upper resistor of the divider, of approx double the input capacitance, to form a capacitive divider with the input capacitance.