Electronics > Projects, Designs, and Technical Stuff
Oscillations! Linear variable PSU
ogden:
--- Quote from: Datguy123 on May 18, 2020, 07:18:35 am ---The aim of building this power supply is to utilize the parts I have available to me.
--- End quote ---
Ok. That is constraint indeed, but good one.
--- Quote ---The transformer I'm using comes from a power amplifier and does not have lower voltage taps on the main secondary winding.
--- End quote ---
Power amplifiers usually have two secondaries and possibly some auxiliary winding. In case power secondaries are two separate windings - you have option of "middle tap". Connect secondaries in parallel to get lower voltage & double current, connect in series to get higher voltage lower nominal current. Simplest way to switch between two - relay.
Datguy123:
--- Quote from: ogden on May 18, 2020, 05:23:57 pm ---Power amplifiers usually have two secondaries and possibly some auxiliary winding. In case power secondaries are two separate windings - you have option of "middle tap". Connect secondaries in parallel to get lower voltage & double current, connect in series to get higher voltage lower nominal current. Simplest way to switch between two - relay.
--- End quote ---
The power secondary windings are center-tapped. 2 identical power secondary windings of 3 output taps 57Vpk-0-57Vpk. No way to decrease the voltage further.
--- Quote from: xavier60 on May 17, 2020, 11:52:09 am ---Having a single inverting VAS transistor can be corrected by swapping the opamp's inputs so long as its local feedback still goes to its inverting input. A resistor will be needed in series with the feedback capacitor.
--- End quote ---
So you're saying that local feedback is needed for a single transistor VAS, such as a miller capacitor? Is it to reduce the gain at high frequencies and ensure sufficient phase margin? I am unfamiliar with the topic of poles and zeros and have no idea what sort of feedback/compensation is needed to deter any instability.
So in your suggested configuration, my circuit would have a single transistor common-emitter stage driving a Darlington driver stage but does this have an advantage over using a differential pair as the VAS instead apart from part count?
--- Quote from: xavier60 on May 17, 2020, 11:52:09 am ---If you drive the VAS transistor's Base directly with the opamp, Vas compensation will need to be done with a capacitor from collector to ground.
Look at some typical AB audio amplifier circuits for ideas.
--- End quote ---
Sorry, but what does VAS compensation do? And why only if it's driven directly from the op-amp?
Anyways with my current design, are there other areas I have overlooked? I am planning to add current limiting as well, by placing a shunt transistor between the non-inverting terminal of the U7 and ground but would that be a problem because of the slew rate of the op-amp?
xavier60:
There is little difference between a typical AB audio amplifier and a power supply with an Emitter follower output stage.
I don't properly understand Poles and Zeros.
With the audio amplifier, from the inputs to the output of the VAS, it's a trans-conductance stage. Input voltage difference signal causes an output current signal. So long as the VAS output is lightly loaded, it results in very high voltage gain.
To make the loop stable with feedback applied, the response is made to fall with increasing frequency. This is done by directly loading the output of the VAS with a capacitor or putting a Miller feedback capacitor between C-B of the VAS transistor.
The idea is to have the gain drop too low for oscillation to occur before the phase shift of the whole loop exceeds 90°.
I see no advantage in having a differential VAS stage unless it's for having a current mirror on the high-side.
The single VAS transistor can have its Base directly voltage driven by the opamp and have an Emitter resistor which will cause it to be a simple voltage to current converter. The compensation capacitor would go between C-E.
Or the Base could be current driven via a resistor, no Emitter resistor. The capacitor goes between C-B.
The opamp makes things a bit messy, it will need local feedback to reduce its gain to something low but must not have any significant roll off.
I have likely missed something.
Buy now, the topology I suggested in Reply #7 should be starting to look like a good idea.
Datguy123:
--- Quote from: xavier60 on May 22, 2020, 09:53:27 am ---There is little difference between a typical AB audio amplifier and a power supply with an Emitter follower output stage.
I don't properly understand Poles and Zeros.
With the audio amplifier, from the inputs to the output of the VAS, it's a trans-conductance stage. Input voltage difference signal causes an output current signal. So long as the VAS output is lightly loaded, it results in very high voltage gain.
To make the loop stable with feedback applied, the response is made to fall with increasing frequency. This is done by directly loading the output of the VAS with a capacitor or putting a Miller feedback capacitor between C-B of the VAS transistor.
The idea is to have the gain drop too low for oscillation to occur before the phase shift of the whole loop exceeds 90°.
I see no advantage in having a differential VAS stage unless it's for having a current mirror on the high-side.
The single VAS transistor can have its Base directly voltage driven by the opamp and have an Emitter resistor which will cause it to be a simple voltage to current converter. The compensation capacitor would go between C-E.
Or the Base could be current driven via a resistor, no Emitter resistor. The capacitor goes between C-B.
The opamp makes things a bit messy, it will need local feedback to reduce its gain to something low but must not have any significant roll off.
I have likely missed something.
Buy now, the topology I suggested in Reply #7 should be starting to look like a good idea.
--- End quote ---
Thanks for the advice. Seems like I will redesign the power supply with regards to reply #7, but have 2 identical series stages instead of 1. I have a few questions, in that schematic, does Q2 aim to provide voltage gain and current buffering at the same time? Without an emitter resistor, wouldn't the voltage gain of that stage be huge? Also, how are the values of C9, C3 and C4 determined? And are base stoppers not needed for the output transistors? Thanks again, and sorry for all the late replies.
I would be enlisting soon so this project will be put to a temporary halt.
xavier60:
--- Quote from: Datguy123 on May 25, 2020, 06:52:20 am ---
Thanks for the advice. Seems like I will redesign the power supply with regards to reply #7, but have 2 identical series stages instead of 1. I have a few questions, in that schematic, does Q2 aim to provide voltage gain and current buffering at the same time? Without an emitter resistor, wouldn't the voltage gain of that stage be huge? Also, how are the values of C9, C3 and C4 determined? And are base stoppers not needed for the output transistors? Thanks again, and sorry for all the late replies.
I would be enlisting soon so this project will be put to a temporary halt.
--- End quote ---
Needless to say, develop it as a single stage first. Deriving the dynamic reference for the 1st stage could get challenging.
Q2 and the TIP35C's form a Sziklai pair, it could have also been a PNP Darlington.
https://www.electronics-tutorials.ws/transistor/darlington-transistor.html
Power supply design topologies can be divided into 2 groups, voltage sourcing and current sourcing. The one I'm suggesting is the current sourcing type.
The Sziklai pair has a high current gain, anywhere from 5000 to 15,000, maybe wider, depending on the spec of the particular transistors used.
Q2's Base sees voltage drive via 1K resistance. Overall, a voltage change applied to the Base of Q1 causes a current change at the PSU's output. And with good linearity, surprisingly.
C3 and R5 are for CV loop's compensation. The default values should result in a stable loop for a wide range of output transistor specs.
The CV compensation can be the optimized by trial while doing a repetitive load transient test.
C4 is for CC loop compensation. Because the PSU's outputs stage has a constant current sourcing characteristic, the loop response can be made slow.
The value of C4 isn't critical but might need to be scaled to different CS resistor values. I haven't given much thought to if low-side sensing can be used for your project.
Follow the layout suggestion I made in reply #3.
Depending on layout, Base stoppers should not be needed. I have been using the design in a bench supply for a year with no sign of local oscillation. The only trouble I had was a short loss of regulation if an arc was caused while connecting a load. It was a layout problem causing high levels of hash to reach the inputs of the CV opamp.
https://www.eevblog.com/forum/projects/linear-lab-power-supply/msg2388873/#msg2388873
Navigation
[0] Message Index
[#] Next page
[*] Previous page
Go to full version