Oscillations! Linear variable PSU

[xavier60]

I think that the voltage set point for the 1st stage can be derived by halving the sum of a proportion of the input voltage and of the output voltage. This can be done closely enough with a resistor adder.
For example if the input is 60V and the output of the 2nd stage is set to 10V, the sum is 70V. The output of the 1st stage gets set to 35V.
There will be 25V drop across each stage.
Fast current limit can be applied to both stages, slow CC can also be applied to the 2nd stage.

[Datguy123]

I think that the voltage set point for the 1st stage can be derived by halving the sum of a proportion of the input voltage and of the output voltage. This can be done closely enough with a resistor adder.
For example if the input is 60V and the output of the 2nd stage is set to 10V, the sum is 70V. The output of the 1st stage gets set to 35V.
There will be 25V drop across each stage.
Fast current limit can be applied to both stages, slow CC can also be applied to the 2nd stage.

Hi, sorry for the period of inactivity.

I have drafted out a circuit over the free time I have, and I hope i have computed the values for the resistors correctly. However, I am unsure where to place capacitors/resistors to ensure the circuit has phase/gain margin. Please advice me on that And also, should I factor in current limiting into the design before doing any loop stabilizing?

Thanks.

[xavier60]

Use this version of the design that I have been using as a starting point for the drive and compensation.
https://www.eevblog.com/forum/beginners/lm324-power-supply-with-variable-voltage-and-current/msg3089254/#msg3089254
The BD139 can be used for Q1 in case more drive current is needed.

I have settled on the D45H  for the driver because of its consistently higher hFE.
If you already have the TIP42's, measure the hFE to be sure it's not too low.
The actual output voltage needs to be used to derive  the reference for the 1st stage so that both stages will share properly while current regulating.
I think it can be done with just 3 resistors. 2 of the same value to sum the unreg input and the output of the 2nd stage. The 3rd goes from the summing node to ground.

The current regulation can be done the same as mine applied just to the 2nd stage or maybe to both in a way only fast limiting is applied to the 1st stage.

[Datguy123]

Use this version of the design that I have been using as a starting point for the drive and compensation.
https://www.eevblog.com/forum/beginners/lm324-power-supply-with-variable-voltage-and-current/msg3089254/#msg3089254
The BD139 can be used for Q1 in case more drive current is needed.

I have settled on the D45H  for the driver because of its consistently higher hFE.
If you already have the TIP42's, measure the hFE to be sure it's not too low.
The actual output voltage needs to be used to derive  the reference for the 1st stage so that both stages will share properly while current regulating.
I think it can be done with just 3 resistors. 2 of the same value to sum the unreg input and the output of the 2nd stage. The 3rd goes from the summing node to ground.

The current regulation can be done the same as mine applied just to the 2nd stage or maybe to both in a way only fast limiting is applied to the 1st stage.

I saw another circuit online: http://www.kerrywong.com/blog/wp-content/uploads/2013/12/ps_pos.png which also deploys a sziklai pair output.

I would like to ask if the main advantage of incorporating the additional 8V supply and having op amps to sink current is to aid in the current limiting of the circuit. From my understanding, the CV op amp will try to pull the base voltage up when current limit is on and the constant current op amp doing the opposite. In the case of Kerry Wong's design, is it true to say that the base drive would be weak as both CC and CV op amps are working in different directions and would end up in an equilibrium (CV op amp at +max O/P v and CC op amp at -max O/P v) and the base does not get driven well? However in the circuit you proposed, the base drive would be stronger as the diode D1 prevents CV op amp from sourcing current to the base when CC op amp is sinking current.

Also, I need to use high side current sensing as this would be part of a dual rail PSU, so would using a differential amplifier to sense the voltage from a shunt resistor on the + rail and comparing it to a voltage signal from an DAC be effective?

[xavier60]

Use this version of the design that I have been using as a starting point for the drive and compensation.
https://www.eevblog.com/forum/beginners/lm324-power-supply-with-variable-voltage-and-current/msg3089254/#msg3089254
The BD139 can be used for Q1 in case more drive current is needed.

I have settled on the D45H  for the driver because of its consistently higher hFE.
If you already have the TIP42's, measure the hFE to be sure it's not too low.
The actual output voltage needs to be used to derive  the reference for the 1st stage so that both stages will share properly while current regulating.
I think it can be done with just 3 resistors. 2 of the same value to sum the unreg input and the output of the 2nd stage. The 3rd goes from the summing node to ground.

The current regulation can be done the same as mine applied just to the 2nd stage or maybe to both in a way only fast limiting is applied to the 1st stage.

I saw another circuit online: http://www.kerrywong.com/blog/wp-content/uploads/2013/12/ps_pos.png which also deploys a sziklai pair output.

I would like to ask if the main advantage of incorporating the additional 8V supply and having op amps to sink current is to aid in the current limiting of the circuit. From my understanding, the CV op amp will try to pull the base voltage up when current limit is on and the constant current op amp doing the opposite. In the case of Kerry Wong's design, is it true to say that the base drive would be weak as both CC and CV op amps are working in different directions and would end up in an equilibrium (CV op amp at +max O/P v and CC op amp at -max O/P v) and the base does not get driven well? However in the circuit you proposed, the base drive would be stronger as the diode D1 prevents CV op amp from sourcing current to the base when CC op amp is sinking current.

Also, I need to use high side current sensing as this would be part of a dual rail PSU, so would using a differential amplifier to sense the voltage from a shunt resistor on the + rail and comparing it to a voltage signal from an DAC be effective?

Ill have to get back to some of that later.
For the best chance of success with high side sensing if you want it to be reasonably accurate and settable, do it like this,
 https://www.eevblog.com/forum/projects/improving-adjustable-dual-voltage-bench-power-supply/msg3020386/#msg3020386
I'm not sure yet what that sensing circuit would drive into, likely an opamp/comparitor circuit.

 EDIT; Actually the LT6105 works the same way.

[Datguy123]

Use this version of the design that I have been using as a starting point for the drive and compensation.
https://www.eevblog.com/forum/beginners/lm324-power-supply-with-variable-voltage-and-current/msg3089254/#msg3089254
The BD139 can be used for Q1 in case more drive current is needed.

I have settled on the D45H  for the driver because of its consistently higher hFE.
If you already have the TIP42's, measure the hFE to be sure it's not too low.
The actual output voltage needs to be used to derive  the reference for the 1st stage so that both stages will share properly while current regulating.
I think it can be done with just 3 resistors. 2 of the same value to sum the unreg input and the output of the 2nd stage. The 3rd goes from the summing node to ground.

The current regulation can be done the same as mine applied just to the 2nd stage or maybe to both in a way only fast limiting is applied to the 1st stage.

I saw another circuit online: http://www.kerrywong.com/blog/wp-content/uploads/2013/12/ps_pos.png which also deploys a sziklai pair output.

I would like to ask if the main advantage of incorporating the additional 8V supply and having op amps to sink current is to aid in the current limiting of the circuit. From my understanding, the CV op amp will try to pull the base voltage up when current limit is on and the constant current op amp doing the opposite. In the case of Kerry Wong's design, is it true to say that the base drive would be weak as both CC and CV op amps are working in different directions and would end up in an equilibrium (CV op amp at +max O/P v and CC op amp at -max O/P v) and the base does not get driven well? However in the circuit you proposed, the base drive would be stronger as the diode D1 prevents CV op amp from sourcing current to the base when CC op amp is sinking current.

Also, I need to use high side current sensing as this would be part of a dual rail PSU, so would using a differential amplifier to sense the voltage from a shunt resistor on the + rail and comparing it to a voltage signal from an DAC be effective?

Ill have to get back to some of that later.
For the best chance of success with high side sensing if you want it to be reasonably accurate and settable, do it like this,
 https://www.eevblog.com/forum/projects/improving-adjustable-dual-voltage-bench-power-supply/msg3020386/#msg3020386
I'm not sure yet what that sensing circuit would drive into, likely an opamp/comparitor circuit.

 EDIT; Actually the LT6105 works the same way.

I have incorporated the high side level shifting current limiting circuit, as well as the resistive summer and divider in the attached circuit. Please advice me if the general design has any flaws. I guess I'll use the op amp circuit instead of the LT6105, unless I want the extra level of precision in another revision of my power supply. Right now I want to use what I have currently. I will be using a dac (most likely MCP4725) for I_set, with lowest step interval of 50mA.

Also, the op amps I will be using will be Lm358 instead of op747. I hope to hear from you soon on the use of the extra 8V supply opposed to not having it at all for the VAS transistor.

[xavier60]

The separate 8V isnt needed  for the ORing node pullup. Just use the + opamp supply. If there is too much max drive voltage for the level shifter transistors, resistors could be put from the ORing nodes to ground.
If the CC loop is needed to be stable, U4 might need a compensating capacitor from output to inverting input. But this will slow the response to sudden oveloads.
Fast limiting could be added. An NPN transistor could sense the voltage across R12. It would then drive a PNP transistor that would bypass the B-E drive for Q6.

For R1,2,4,5, start with 1K.

[David Hess]

I like your level shifters.  Keep in mind that the differential pairs could also be made with NPN/PNP pairs.  What is really going on is an emitter follower to increase the current driving a common-base stage to increase the voltage.

Track down the high current wiring and the return paths for any high currents.  These are the connections which must be wide and short to minimize the effects of inductance.  Of course this includes the collector and emitter wiring of the output transistors but it also includes any capacitors connected to that wiring.

[xavier60]

     The high side current sensing needs to always have some voltage present on the output to work properly.
Put it before the 2nd stage.
Fast limiting will be easier to implement with a PNP monitoring the voltage across the CS resistor and its Collector going to the Base of  Q6.

[David Hess]

The high side current sensing needs to always have some voltage present on the output to work properly.

Power supply circuits of that complexity usually include a negative supply for the control circuits so the high side error amplifier can operate down to 0 volts, or actually a little lower.  For bipolar dual output supplies, this is free.

[dietert1]

Let's try to write a comment concerning oscillations:
You need to understand what is the meaning of unity gain stability. If you buy an OpAmp that is called unity gain stable (the OP747 is of that type), that means it has internal bandwidth limiting and enough speed that allows you to feed back the full output signal to the input - for maximum accuracy. You added additional gain stages with gain of 20 (680 Ohm/33 Ohm). That means you are feeding back 20x the OpAmp output signal back to its input. You cannot do that, otherwise you get oscillations.

I can see another error in your design. You added two capacitors to reduce gain at high frequencies: C10 and C21. You cannot do this. Already at moderate frequencies those 2 caps will cause a phase shift of near 180°, which means negative feedback becomes positive feedback => oscillations.

Unless you have a lot of practical experience with circuits of this type, you need to simulate your design. Open the control loop and try to understand the Bode diagram to decide whether the closed loop will be stable or not. Just soldering circuits you can spend years trying to find a good solution.

Regards, Dieter

[Datguy123]

The separate 8V isnt needed  for the ORing node pullup. Just use the + opamp supply. If there is too much max drive voltage for the level shifter transistors, resistors could be put from the ORing nodes to ground.

Thanks, I will take note when I build the prototype. But any advantages to the current limiting part of the circuit with a current sinking design of the VAS transistor(quote below)?

I saw another circuit online: http://www.kerrywong.com/blog/wp-content/uploads/2013/12/ps_pos.png which also deploys a sziklai pair output.

I would like to ask if the main advantage of incorporating the additional 8V supply and having op amps to sink current is to aid in the current limiting of the circuit. From my understanding, the CV op amp will try to pull the base voltage up when current limit is on and the constant current op amp doing the opposite. In the case of Kerry Wong's design, is it true to say that the base drive would be weak as both CC and CV op amps are working in different directions and would end up in an equilibrium (CV op amp at +max O/P v and CC op amp at -max O/P v) and the base does not get driven well? However in the circuit you proposed, the base drive would be stronger as the diode D1 prevents CV op amp from sourcing current to the base when CC op amp is sinking current.

For R1,2,4,5, start with 1K.

I did some calculations. The max current the power supply is capable of is 6A, and having a conservative hfe of the sziklai pair (TIP42C: 30, TIP35C: 20), Q6 would need to draw 5mA of current from R6. The voltage drop across that resistor would be 5V if it was 1k ohm, which is too much. (50V input, 45V output max). Would you then advice a lower value for R1,2,4,5?

[Datguy123]

     The high side current sensing needs to always have some voltage present on the output to work properly.

Why is that so?

[xavier60]

There needs to be some positive voltage at the top of R13  for Q7 to source current to ground.

[Datguy123]

Power supply circuits of that complexity usually include a negative supply for the control circuits so the high side error amplifier can operate down to 0 volts, or actually a little lower.  For bipolar dual output supplies, this is free.

Hi, I'm actually building a dual rail power supply. So by having a negative rail for U3 (In fact, I'm powering all op amps with +15V and -12V rails), the current limiting circuit can work properly at 0V output?

[xavier60]

For R1,2,4,5, start with 1K.

I did some calculations. The max current the power supply is capable of is 6A, and having a conservative hfe of the sziklai pair (TIP42C: 30, TIP35C: 20), Q6 would need to draw 5mA of current from R6. The voltage drop across that resistor would be 5V if it was 1k ohm, which is too much. (50V input, 45V output max). Would you then advice a lower value for R1,2,4,5?

I didnt follow all of that. Although most BJTs have much higher hFE than the specified minimum, Im not so sure about the TIP42C. That's why I settled for the D45H11. I tested a whole packet of them finding the hFE close to 200 and within a few % of each other.
Start with 1K anyway.