| Electronics > Projects, Designs, and Technical Stuff |
| Oscilloscope ASIC Kickstarter instead of Open scope. |
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| nctnico:
--- Quote from: excitedbox on January 11, 2020, 12:07:26 am ---You can not say what can or can not be afforded without knowing how much this chip costs. We know right now the ADCs etc are expensive. We know FPGA development takes a lot of time, making it expensive. We know Open Source projects reduce costs in 95% of cases. Paying 5-10 engineers 50-60k a year to develop memory controllers on an FPGA is money you can save if you have a chip that has a memory controller on it. --- End quote --- ASICs are even more expensive to design compared to FPGA. Actually many digital ASIC designs are prototyped/debugged using FPGAs. Either way the hardware cost of an open source oscilloscope is largely irrelevant. There is lots of existing hardware for sale anyway. When push comes to shove it is perfectly feasible to take an existing piece of hardware (for example a low cost Hantek) and create new firmware for it. However even when including the FPGA development the balance between hardware & software effort to create a digital oscilloscope is 1 to 50. Writing good oscilloscope firmware is a massive task which is where open source oscilloscope projects fail. It takes probably 3 complete rewrites before getting the fundamental structure right. If there is any chance on a succesful project then start with the software while using an existing platform (red pitaya, analog discovery, etc). Once the software is done the hardware is peanuts. |
| excitedbox:
That is a good point about the software that is why I want to include a "scope OS" with this project or at least a framework. Just like there is Openwrt, RouterOS, Asterix etc. We do have the sigrok firmware but right now no manufacturer wants to use that. The reason development is so expensive is because the signaling hardware is so different in each scope. You can´t just attach a SOC and send some triggering commands to a chip or set the attenuation or gain. There is also the problem of light speed. Hantek CAN'T give us more without ASICs the distance that the electrons travel in that time becomes to short. So even if someone wanted to capture signals faster it just isn´t possible. This applies to other products besides scopes as well. If there is a simple to use signal capturing chip, a ton of other opportunities open up. In addition a FPGA is really complex internally which makes them expensive. A chip has tons of transistors and resistors but a FPGA needs all the same stuff PLUS the routing and switching transistors. There is a ton of complexity that can get removed. If you look at the links I posted below a custom ASIC starts to look very attractive with a development savings of 40-60% and a BOM savings of 50%. Their calculation is if you spend 250k a year on parts you can recover the investment in 1 year using multi Layer Reticals. We all know that when working with Arduino, using a motor library etc speeds things up tremendously. So if we can offer a library to interface with this chip it will drive costs down much more. I have already gotten interest from 3 other projects that say yes, it would make things easier and I am looking to contact more in the coming week to see what would be interesting for them. Claims a 40-60% development cost savings in addition to noise reduction and other benefits. https://www.sigenics.com/blog/7-asic-integration-benefits Custom Silicon Solutions claims 125-250k NRE expenses for a custom mixed signal asic and 50% savings on components. http://blog.customsiliconsolutions.com/uncategorized/custom-asic-development-cost-considerations Tantech- Again the argument that because there are $2000 350mhz options we don´t need $1000 options for 1GHz is stupid. Also you are assuming that companies don´t want to save money. And you are making that assumption before even knowing what savings are possible. The hypothetical specs I mentioned ARE NOT SET IN STONE as I have mentioned before but you keep ignoring. You would rather push breaking the law. If you don´t like it don´t participate, If one of these chips gets developed you don´t have to use it or buy a product using it. It is stupid not to innovate just because YOU are happy hacking your oscilloscope. There are plenty of arguments to make against this but none of yours are valid. If someone had asked does anyone need a DDS chip like the AD9850 you would have said no way, you can already build that yourself. But a ton of signal generators use it. Or even better the BA5937AFP which is a 4 Channel driver chip used in DVD drives. It is just a couple OpAmps but for some reason every DVD and CD drive uses those chips instead of putting 7 OpAmps in their drive. |
| unitedatoms:
I'd hate to work in R&D with bosses who think that R&D has a predictable cost. Say someone walks into the room and says, $250k to start and finish this design. Go! Idiocy! That is the breed of MBAs we (technocrates) allowed to grow and start speaking and even have an attitude. They have a language with words like "SME" Subject Matter Expert, because they themselves have no clue about a subject, only about accounting. This SME word must freaking die in history. "SME"s should ever work for bosses who are technical or scientific themselves. Not for those who have no back history of doing the homework and sweating on the Subject Matter. |
| excitedbox:
Did you read the last post and that is it or did you need me to explain it more clearly? Nobody assumed any cost was set in stone in addition to most talk having been of costs 4 times as high. I was stating that with their reported costs for the development coming to $250k dollars and that 250k being a 50% savings would conclude that if you spend $500k in parts you would recover your money in 1 year. It was an attempt to make it easy for people to understand since. People essentially keep saying you can´t make money by paying less for parts. Id hate to work with people who every time you say "We could do this, or we could do that", that it is an absolute. I say we need to see what is needed but a chip with 4gsps would offer these possibilities and their answer is 4gs exists, 4 gs is not possible, Rigol does 4gs, nobody can do 4gs and not go broke. Nobody needs 4 gs. Do you see how that is not productive? Maybe that is the difference between management and a worker. The worker has been told what to do so long he can only think in terms of definites and not maybes. You have to explore and discuss what is possible, what makes sense, what are the trade offs, what are the numbers. People keep making assumptions and when I show examples of their assumptions being wrong they again assume that those examples now apply to this. I just wish that the idiots would learn to keep it to themselves. If they disagree good. Don´t waste my time with it though. |
| unitedatoms:
When last time Europeans (nations occupying Europe geographically) made an Asic with more than 100 transistors ? Simple question. Edit: I mean NEW asic design |
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