For reference, the ADC used in the Siglent SDS-1104x (it uses one per pair of channels) is, AFAIK, the HMCAD1511. The per-channel VGA is AD8370 and per-channel ADC driver is ADA4932-1. For two channels, you're looking at about $70 just between those parts.
one maybe can get cheaper 50% discount at best by buying in say 1000pcs qty, but $35K? only for that? maybe we are looking at $100K (if using FPGA uneducated guess) excluding headache to find and deal with assembler and mold maker (enclosure) its time for a new brand name company, maybe Riglent? or Siglol? or more precisely... SickLoL.. jk..
...you can get tens of GHz of BW using sampling scope technology, or massive array of 1Gsps ADCs to achieve realtime. This is the secret sauce part of mainstream players.
lets forget sampling scope which can be done with KSps or MSps ADC at tens of GHz BW, its different beast people have done it at cheap. but when you said mainstream players are using massive array of ADCs? i dont think so. i believe its another custom ASIC in one package, maybe massive array they are, but they are in one package, and in one IC... (pictured below, unluckily blocked by a heatsink)
4. Equally important is analog frontend. That's the difference between a good scope and a cheap scope. With the same ADC, an R&S scope is quieter than a Rigol, here's the difference....
Thus, I recommend to start from the easy part, AFE, then S/H. Leave the professional people do the digital stuff, and they will trickle down from consumer stuff quickly and cheaply.
if you refer to this thread,
Lecroy DDA-5005 DSO Teardown AFE for high end (50 ohm) scope is quite simple, i guess anyone can do with a free EM simulator and proper PCB materials... but once the signal goes into the ADC/DSP/ASIC/whatever it is, thats where the massive array of money is... there are few of them, from ADC/AFE to DSP/ASIC to RAM down the line, those the unobtaniums...

ps: i once tried to figure out the possibility of diy high sampling rate DSO, 10x whats the venerable DS1054Z can, using their brilliant idea of interleaving slower ADCs. the first study is to look at ADC cost in digikey, luckily that alone made me teared the idea into pieces without further wasting my time.... yeah agreed, let the man do their job.. let me tinker with arduino...