PCB layout guidelines for ultra low-noise analog front end

[ricko_uk]

Hi,
I have experience in general low-noise PCB layout. But I am looking for EXTREME guidelines (documents, videos or any resources) for analog front end layout measuring microvolts (sometimes to nanovolts) signals.
I am not talking about just the basic well know guidelines (PCB decoupling, plane separation, GND via fences etc) or even the much less known/used one such as amplifier guard ring traces etc. I am talking about truly extreme PCB design guidelines.
Any suggestions and pointers to any resources (PDF, videos, web pages etc)?
Many thanks

[thm_w]

I think low-noise and low level signals are two related but slightly different things.
You may want to look at the Keithley voltmeter designs for example:
https://xdevs.com/review/k182m/
https://www.eevblog.com/forum/testgear/nanovoltmeters-performance/

low noise amp:
https://www.eevblog.com/forum/metrology/need-lna-for-low-frequency-low-level-preamp/
http://www.hoffmann-hochfrequenz.de/downloads/lono.pdf

Guard ring traces, shields, board cutouts, teflon standoffs.

[nctnico]

IMHO these kind of designs come down to designing ground paths (=power supply return paths). A guideline only goes so far.

[moffy]

IMHO these kind of designs come down to designing ground paths (=power supply return paths). A guideline only goes so far.

I agree, plus taking care to minimise voltages produced by temperature differences across components, due to thermocouple effects. Also keep the impedances low throughout.

[Someone]

I am looking for EXTREME guidelines (documents, videos or any resources) for analog front end layout measuring microvolts (sometimes to nanovolts) signals.

Whats the bandwidth of the measurement? That makes a world of difference to the approach. The basics come back to considering all the possible noise sources and their impact on the final result. Not sure there are any public guides on the matter as it is both domain specific, and commercially valuable information.

[ricko_uk]

Thank you all for our feedback, much appreciated!!

[Rerouter]

The extremes are less well documented. It mainly gets into calculating error contrubutions.

E.g. if measuring ppm you have to account for thermal gradients on the board generating small voltage differences because one pin is slightly hotter than another. And this gradient shape can change depending on the input voltage to the amplifier as its output power may change. Or the rail that is contrubuting that power may shift

Power supply ripple rejection is a good way to soak up margins. Also some op amps are far better than others in terms of what application your solving. I find mapping out the noise graphs into frequency bins for each device gives a good overveiw for what frequencies you end up the most sensitive to.

Plan your return paths. Treat anything critical like a differential signal. If a minutes work can remove an uncertainty of 0.1ppm a few hundred times over the length of a project. It starts adding up

Keep decoupling loops seperated from other grounds. All device power connections go to the capacitor. Then the plane or trace which feeds it

Choosing where you common your grounds can matter. For me it usually ends up at the measurement connector ground rather than the supply ground. With good considerstions for just how much current is flowing along that ground.

[ricko_uk]

Thank you all

[Rerouter]

To fill in some gaps.

Op amp noise
https://www.analog.com/media/en/training-seminars/tutorials/MT-049.pdf
https://www.analog.com/media/en/training-seminars/tutorials/MT-047.pdf
http://www.ti.com/lit/an/slva043b/slva043b.pdf

Seebeck Effect (Thermal)
http://ww1.microchip.com/downloads/en/appnotes/01258b.pdf
https://electronics360.globalspec.com/article/9981/pcb-layout-for-precision-operational-amplifiers

Johnson-Nyquist (Passive components Noise)
https://www.analog.com/en/analog-dialogue/raqs/raq-issue-25.html
http://www.resistorguide.com/resistor-noise/

Dielectric Absorbsion (Capacitors)
https://ntrs.nasa.gov/archive/nasa/casi.ntrs.nasa.gov/20140008867.pdf
https://nepp.nasa.gov/files/25847/2013-Taverovsky-paper-NEPPweb-MLCCsVabs-n264.pdf

EMI Reduction
http://www.ti.com/lit/an/szza009/szza009.pdf

General Guide
https://www.analog.com/media/en/training-seminars/design-handbooks/Basic-Linear-Design/Chapter12.pdf

[radioactive]

Another thought... leave some pads for some Tantalum caps if you didn't already.  Ceramic caps can be problematic if there are issues with vibration / stresses on the pcb when dealing with low voltage measurements.  "microphonics".