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Package Choice
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kbarnette:
Hello!  I'm working on a test rig for a senior design project that will take a newly fabbed and packaged chip and run some tests on the different devices in the package.  An "incidental" decision the semiconductor fabrication team has also asked me to decide is what package to use when they're done with the die fabrication.  This isn't for high volume production, nor is it speed critical.  The preference is for 48 pins but somewhere between 24 and 48 would suffice.  The main constraints will be ease-of-packaging and the ability to find a ZIF socket into which we can insert many of these devices packaged in the chosen format for testing.  Here's the kicker, the smallest size of the die they're manufacturing they can get to is 18.75mm x 18.75mm.  They've recommended Kyocera as the package manufacturer they'd like to stick with.

I have very little experience with package choices and after digging around it appears that an 18.75mm x 18.75mm die size is quite large.  The only package I can find (from Kyocera) is a CERQUAD QFP package with 304 pins!  I'm struggling to find a ZIF that will take a 304 pin QFP and figure packaging the device in such a high density format when the device will have somewhere around 24 pins will be....tedious.

Am I correct in my finding that this is quite a large die?  Does anyone have any suggestions on where to find a package that will fit the constraints above and for which it will be easy to find and use a ZIF socket?
OwO:
What is the maximum power dissipation? The die being so large suggests either there are power components or a shit ton of logic. (1) implies high current even if power dissipated is low, and (2) implies high power dissipation.
OwO:
Since the pin density isn't high you might look into chip-on-board construction (directly put solder balls onto the chip pads, then solder the chip to the board like a BGA), but if power dissipation is high then the best bet is probably QFN. If power dissipation is >2W then flip-chip BGA with a carrier and heat spreader may be the only way.
kbarnette:
The die is so big because it's being manufactured by a grad student and consists of very few but very difficult to fabricate experimental memory technologies.  There isn't a lot of logic, nor is there a large power requirement  I'm expecting less than 1mW to go through the device for short periods of time during characterization of the devices.

I really like the chip-on-board idea but we'll need to swap these out to be able to test new dies as they're fabricated.

If nothing else I suppose I can just fabricate a handful of small daughter chip-on-boards that slip into a large DIP socket or something like that.

Keep the ideas coming!  You guys are awesome!  :D
T3sl4co1l:
Sheesh... I'd be worried about finding a package that can fit a die that big without cracking in the first place.

Is ceramic particularly good in that respect?  I forget.  Pentiums were about that big so it can't be too bad.  DIP40 to 64 (the latter being extra wide), PGA and LCC come to mind.  Sockets may not be the easiest to find but even making a bed-of-nails fixture will still pale in comparison to the fab cost I would think.

Tim
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