PCB Prepreg Thickness

[Glenn0010]

Hi,

I’m looking at 4 layer PCB design. I’m going to have a 400 V signal between layers 1 and 2. This signal is going to be swinging between 400 V and 0V at 100 kHz. As shown below

 

I was wondering if anyone could recommend a layer stack up to help avoid the prepreg breaking down

I know that the breakdown voltage of the prepreg is 30-40 kV/mm however this is not the only parameter to consider. I’m also worried about the switching frequency and the fast switching edges as I'm switching a square wave. As far as I know this will "derate" the distance

I only have a small copper area (~10 mm by 5 mm) that is actually this switching node as seen in the image below the read area marked by yellow dot however I'm assuming this still needs to be taken into account as I don't want the prepreg breaking down.



I want the distance to be as small as possible to reduce the inductance between the 2 layers but at the same time I want it to be enough as to not breakdown the material

Could you help with recommending a layer stack up or a minimum distance between layers 1 and 2?

Best Regards,

Glenn

[thm_w]

https://www.magazines007.com/pdf/High-Voltage-PCDesign.pdf
https://ewh.ieee.org/r10/taiwan/pses/archive/2012_04_27/IEEE%20PSES%20April/TC108%20hf_FC_v.1.2_IEEE%20PSES%20TAI.pdf

If you needed to notch out some of the copper below the node on the 2nd layer, I'm not really seeing that being a big deal at 100kHz.
But it may not even be necessary at the standard 0.2mm prepreg.

Don't try to make it super thin just to "reduce the inductance" unless you have a specific impedance target you are trying to hit, and that is required for it.

[Glenn0010]

Cheers thm_w, I think slotting layer 2 as you suggested might be the best way to go