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Please help design discrete JFET preamplifier
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SiliconWizard:

--- Quote from: magic on March 06, 2020, 06:41:36 pm ---Until you run into Johnson noise of the base/gate parasitic resistance. Dunno if LTspice has models of that.

--- End quote ---

According to LTSpice help:

--- Quote ---.NOISE -- Perform a Noise Analysis
This is a frequency domain analysis that computes the noise due to Johnson, shot and flicker noise. The output data is noise spectral density per unit square root bandwidth.

--- End quote ---

Do they model only Johnson noise for discrete resistors or also for parasitic resistance in other models, I have no clue.
Kleinstein:
The LTspice noise data are for the output. The NBS circuit has a much higher (x201) amplification. The circuit from Yansi still has quite some noise from R7 (1K) - so for really low noise the resistors should be a little lower. This may requite an additional emitter follower to get more output power. A low gain of only 11 and still very low noise is not an easy/low power combination.

How much noise is included with the parts depends on the model. Not all models include noise. Some of the models for BJTs / JFETs seem to be realistic with some 1/f noise, but not all. Chances are parasitic resistance will also have noise modeled right, but quite a few of OP models do not include noise.
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