| Electronics > Projects, Designs, and Technical Stuff |
| Power bipolar transistor die -> parallel??? |
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| T3sl4co1l:
Consider a finite die on an ideal heatsink. Consider the sub-transistors to be perfectly matched, evenly distributed over the surface, and operating at some load power. The key insight is this: the transistors in the center are surrounded by other transistors, while those at the edge are open to one side. Silicon has finite thermal conductivity, so there will be a difference in temperature rise over the die, with a hot spot in the middle. This is still missing one more bit of info, actually I think -- the transistors cannot run right up to the edge of the die, there must be some buffer space there for dicing and guard rings. This makes a ring of silicon around the edge which is not dissipating power, but is thermally conductive, thus lowering the temperature around the edge. This could be mitigated by placing cells slightly more densely around the periphery, or with extra emitter resistance of course. Preferably with PTC, though I doubt there's anything readily available (i.e., doped or poly-Si, or aluminum metallization, and that's about it..) that has quite a strong enough tempco to compensate Vbe. The initial or low-power hot spotting in this scenario is very modest, but it is exponentiated by the tempco of the device, so there will always be some point where the exponent goes critical and one transistor (preferentially, one near the center) will hog it all and fail. What matters, of course, is whether that critical point is even on the SOA. Ideally it's not. Most audio power BJTs have it towards the edge, not quite off the plot but leaving enough area that it's still plenty useful. Old MOSFETs did (thanks to a poor power density), previous generation MOSFETs largely didn't (high power density, relatively high exponent -- hence the distinction between switching and linear FETs), and current generation (SJ) FETs again seem to (which is pretty amazing given their yet higher power density; I'm not sure what it is that drives this, but in any case, I guess it gives them a low exponent). And since the driving force is temp drop across the die -- simply running at low power helps. Fullpak types are largely good for rated power without 2nd breakdown effects, simply because they're limited to a paltry 30W or so; whereas their metal-tab versions may suffer from it as usual. A SOT-23 part is very unlikely to have such problems, its die is tiny (under 1mm?) and can only dissipate a fraction of a watt. Tim |
| Circlotron:
--- Quote from: T3sl4co1l on November 11, 2019, 10:05:36 pm ---Old MOSFETs did (thanks to a poor power density), previous generation MOSFETs largely didn't (high power density, relatively high exponent -- hence the distinction between switching and linear FETs), and current generation (SJ) FETs Tim --- End quote --- Not trying to derail the thread, but an important and often misunderstood point about mosfets - many people will tell you that they current share across the die area because if one part of the die gets hotter the on resistance increases and causes the hot area to conduct less. All well and good if the mosfet is fully switched on, but in linear operation (which of course is the situation where they are more likely to get hot) the increase in on resistance when hot counts for practically nothing, whereas the gate threshold voltage reduces, causing that hot part of the die to turn on even harder.... :bullshit: :scared: |
| T3sl4co1l:
Yeah, easy to misread the various appnotes and think it's one way or the other, when actually it's both, conditionally. The two operating regimes of the MOSFET have different (more or less opposite) characteristics. :) A lot of people are also stuck thinking that 2nd breakdown is some immutable foundation of BJTs, or MOSFETs, or both. Nah; as I noted above -- there are numerous designs that perform well, and that do not. Check the SOA, it contains all the info you need*! *Although it can vary (nonlinearly) with Tc, and you almost only ever see the SOA at 25°C. So it's not clear if it'll be alright under other conditions. Budgeting for a prototype testing or component qualification phase is always a good idea in such a case. Tim |
| magic:
I think some early MOSFETs (lateral perhaps?) were truly free of second breakdown and that's why people keep repeating this mantra till this day. And it's not just switching people who talk about it, but also audio. I suppose it is a matter of RDS(on) being high enough that its tempco makes more difference than Vth tempco. |
| CatalinaWOW:
--- Quote from: T3sl4co1l on November 11, 2019, 10:05:36 pm ---Consider a finite die on an ideal heatsink. Consider the sub-transistors to be perfectly matched, evenly distributed over the surface, and operating at some load power. The key insight is this: the transistors in the center are surrounded by other transistors, while those at the edge are open to one side. Silicon has finite thermal conductivity, so there will be a difference in temperature rise over the die, with a hot spot in the middle. This is still missing one more bit of info, actually I think -- the transistors cannot run right up to the edge of the die, there must be some buffer space there for dicing and guard rings. This makes a ring of silicon around the edge which is not dissipating power, but is thermally conductive, thus lowering the temperature around the edge. This could be mitigated by placing cells slightly more densely around the periphery, or with extra emitter resistance of course. Preferably with PTC, though I doubt there's anything readily available (i.e., doped or poly-Si, or aluminum metallization, and that's about it..) that has quite a strong enough tempco to compensate Vbe. The initial or low-power hot spotting in this scenario is very modest, but it is exponentiated by the tempco of the device, so there will always be some point where the exponent goes critical and one transistor (preferentially, one near the center) will hog it all and fail. What matters, of course, is whether that critical point is even on the SOA. Ideally it's not. Most audio power BJTs have it towards the edge, not quite off the plot but leaving enough area that it's still plenty useful. Old MOSFETs did (thanks to a poor power density), previous generation MOSFETs largely didn't (high power density, relatively high exponent -- hence the distinction between switching and linear FETs), and current generation (SJ) FETs again seem to (which is pretty amazing given their yet higher power density; I'm not sure what it is that drives this, but in any case, I guess it gives them a low exponent). And since the driving force is temp drop across the die -- simply running at low power helps. Fullpak types are largely good for rated power without 2nd breakdown effects, simply because they're limited to a paltry 30W or so; whereas their metal-tab versions may suffer from it as usual. A SOT-23 part is very unlikely to have such problems, its die is tiny (under 1mm?) and can only dissipate a fraction of a watt. Tim --- End quote --- Though I am not aware of anyone actually doing this, with today's silicon it wouldn't be too hard to implement a resistive heater ring around the perimeter, closed loop controlled to match the center transistors temperature. Providing a very close approximation to an isothermal environment. Perhaps the best implementation of this would be to use the boundary transistors as heaters. And it is totally not clear that such a part would have any market advantage. Patent trolls note. This constitutes public release of this concept. |
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