Author Topic: FTDI synchronous bit bang baudrate for SPI  (Read 1061 times)

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Offline jmajaTopic starter

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FTDI synchronous bit bang baudrate for SPI
« on: February 23, 2023, 02:12:59 pm »
I'm have used FT232R and plan to use FT230X for as a SPI master using sychronous bit bang.

How is actually baudrate defined in D2XX for this? The manual says "The clock for asynchronous bit-bang mode is actually 16 times
the set baud rate." What does this mean in practice? When looking at the FT232R output with oscilloscope there seem to be no constant frequency for SCK unless the baudrate is very high and the package sent rather short. Using the maximum baudrate of 3M the SCK line seems to have 1MHz thus pin output changes at 2 MHz. If I send a 66 bytes long packet the whole packet is sent at that speed. If I send a 100 bytes long packet there is a delay at some point in the middle of the packet where SCK and MOSI are stable for tens of us and then the rest of the packe is output at 1 MHz SCK. Using 2M or 1M baudrate doesn't seem to differ at all from 3M.

Setting baudrate much slower (e.g. 9600) doesn't result to anything like constant 9600 or 16*9600. Only very strange waveform looking more like PWM.

I have read that this is a known feature for FT232R although I haven't seen any details about baudrate.

Will FT230X be different? Still waiting for a PCB to test it.

This is an example of the FT232R waveform problem:
https://swharden.com/blog/2018-06-03-bit-bang-ftdi-usb-to-serial-converters-to-drive-spi-devices/#beware-of-the-ft232r-bit-bang-bug
« Last Edit: February 23, 2023, 02:28:00 pm by jmaja »
 

Offline jmajaTopic starter

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Re: FTDI synchronous bit bang baudrate for SPI
« Reply #1 on: February 27, 2023, 02:50:17 pm »
I did some testing with FT232R, since the PCB for FT230X is still on it's way. Sending 64 bytes equals to 32 SCK cycles. This takes 32 us at 3M baudrate, thus actual output is 2 MHz or 1 MHz as a SPI SCK. Looks nice symmetric square wave.

2M baudrate is just the same as 3M.

1M baudrate is sometimes just the same as 2 and 3M, but sometimes there are a or a few longer pulses and the length of the packet varies from 32 to 35 us.

At 500k baudrate things starts to go really crazy. The packet length is about 100-300 us each looking very different. Picture attached with 32 pulses. The output can be constant from 500 ns to more than 20 us. Thus output varies between 30 kHz and 2 MHz.

At 100k baudrate packet length is about 100 us - 2ms and shortest pulses are 1.2 us = 800 kHz.

At 10k baudrate packet length is about 8-25 ms and shortest pulses are 6 us = 170 kHz.

9600 baudrate is clearly different from 10k. The packet length varies much less (8-13 ms), but still has 6 us pulses and 520 us pulses and many different in between.

I can't find any logic in this!


« Last Edit: February 27, 2023, 03:40:00 pm by jmaja »
 

Offline jmajaTopic starter

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Re: FTDI synchronous bit bang baudrate for SPI
« Reply #2 on: March 08, 2023, 07:03:16 pm »
I finally got the PCB for FT230X today. The first tests show that actual baudrate is really 16* set baudrate. The maximum seems to be around 2.5M for FT230X. Thus anything above about 150k results into 2.5M. With longer packages the average baudrate is limited to about 600k thus setting baudrate higher than 600k/16=37k doesn't change the average real baudrate for longer packets. It just makes the output to have higher baudrate bursts and pauses.  I guess this comes from the USB 12M limit.

 


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