Hi everyone,
I’ve been working on a power OR-ing circuit for a project, and I’ve hit a few design challenges I hope to get some input on.
The circuit is a power OR-ing controller designed to switch between an external battery and a power connector. Both inputs operate between 10-18V DC and can deliver up to 20A. The design has overcurrent and overvoltage protection at both inputs.
I selected the TI LM74900 ideal diode controller for this application. It features back-to-back MOSFET control for OR-ing and integrated current sensing for overcurrent and short-circuit protection. My circuit design follows the TI reference shown in one of their Ti design journals (attached).
Here are my key concerns:
Staying within MOSFET SOA: I need to make sure that my MOSFETs remain within their Safe Operating Area (SOA) during startup and transitions.
Fast Switching: The circuit must switch sources quickly to minimize voltage dips at the output. Power source transitions could happen frequently (every 10-20min), as either the battery or power cable may disconnect at any time.
Startup from Either Source: The device should be capable of starting from either power source and switching between them dynamically.
The LM74900’s low current drive on the Q2 gate limits inrush current but slows down the response time. To address this, I’ve followed the TI application note to add a transistor on the Q2 gate, increasing the gate drive current. However, this modification means I can’t use TI’s calculator tool to verify if Q2 stays within its SOA during startup. There is about 300uf of capacitance but no real resistive load on the output.
For the MOSFETs, I’m considering the Infineon IAUCN04S7L004 due to its very low RDS(on), my board is compact so I'm trying to reduce the thermal impact.
Questions:
How can I ensure fast switching while staying within the MOSFET SOA during startup and transitions?
Are there alternative approaches or controllers that could simplify the design without compromising performance?
What is a typical response time for an OR-ing circuit like this, and would omitting the Q2 transistor (and its associated drive circuit) be an option?
I’ve attached the TI schematic for reference. Any advice or insights would be greatly appreciated!
Thanks!
Owen