Electronics > Projects, Designs, and Technical Stuff

Power supply topology - will it work? (Control theory, stability)

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Kleinstein:
It is a good idea to do the testing with a lower voltage, alone for safety reasons. With a sufficiently fast OP, the higher source resistor is not such a big problem unless it gets too hot.
The LM324 might be still acceptable for it's bandwidth, but the slew rate can be rather poor and the output stage shows quite some cross over distortion when going from current sinking to current sourcing.

I would at least add minimal current limiting with a transistor driven by the voltage at the source resistor and turning down the gate.

There is not that much difference in the control loop when you go to the alternative emitter follower topology. In a unified picture one can also consider other output stages as controlled current sources, just with an addition impedance to ground, to take into account the usually lower output impedance of an emitter follower. However at low currents even the emitter follower will not be that low in impedance to be useful. So one generally still needs the output capacitor of similar size. Some of the capacitance might be moved to the base side of the transistor and thus will not be directly at the output - but the effect is essentially the same in the good and bad.
It's only on transients of increasing load, that the than low output impedance can really help to limit drops in output voltage, so that an slower control loop can be acceptable.

On the downside one also has to make sure the output impedance of the power stage is well behaved and does not tend to oscillate by itself.
Things get better with a push pull output stage, that has a low output impedance even at low currents.

@blueskull:
I think it should be *k4 not +k4 in the transfer function. So no such easy way to prove stability.

The tricky part is to make it stable even with variable load.

Jay_Diddy_B:

--- Quote from: blueskull on November 19, 2016, 08:56:16 am ---
--- Quote from: Kleinstein on November 19, 2016, 08:46:55 am ---@blueskull:
I think it should be *k4 not +k4 in the transfer function. So no such easy way to prove stability.

--- End quote ---

Since A(s)=\$ \frac{G(s)}{1+G(s)*H(s)} \$, multiplying \$ \frac{1}{G(s)} \$ on both nominator and denominator, we get A(s)=\$ \frac{1}{\frac{1}{G(s)}+\frac{1}{G(s)}*G(s)*H(s)} = \frac{1}{(k1*s)*(1+k2*s)*(1+k3*s)+k4} \$

--- End quote ---

I don't understand, intuitively, why the gain (or attenuation) of the divider is treated any differently than any other gain block in the control loop.

If I increase the gain of the feedback and reduce the gain of the plant by the same amount, the loop gain is unchanged.

The loop gain is the product of all the gains in the loop.

Regards,

Jay_Diddy_B

Kleinstein:
Calculating the forward gain and treating the regulator as an amplifier from reference to output may not be enough to check for stability. We actually do not care very much about that gain, as the reference is not really changing fast. The important part is the loop gain, this G*H and the output impedance, thus the response to an current acting on the output.

salbayeng:
The output transistor M1 can be augmented by making it run in cascode mode, this way you opamp isn't sinking all that miller capacitance.
Simply break the connection between M1_Source and R1, put a NPN here , a simple NPN bipolar will work 30v 1A or a small NMOS.
So the opamp now drives the base (gate) of the lower transistor, and the gate of M1 goes to +12 via say 20R (to stop VHF oscillation).
The cascode configuration can also be used with depletion mode FETs (Like the 1600v SiC devices).

You will need zeners/diodes to 12v and/or "gnd" to stop the source node flogging around if the output arcs.
(You need something from gate to source anyway with your existing circuit, otherwise arcs will cause punctures through the oxide).

Note this idea is tossed in as a discussion point only, if your circuit works fine then don't mess it up.

Note you can use a depletion mode MOSFET to make a simple bias supply, as per figure below, this is a 11v output LDO, with input voltage range 11.1v to 250v , Iq is ~ 100uA.
(Output current is limited by heat dissipation, so maybe 2mA at 100v).
This is thrown in for interest only, as it won't work in your circuit as it will drag the unloaded output up.
(Your circuit could probably do with adding a PMOS to drag the output down anyway)

Jay_Diddy_B:

--- Quote from: blueskull on November 19, 2016, 08:32:32 am ---It seems like the circuit is stable. If my derivation is correct, the transfer function should look like this:
G(s)=\$ \frac{1}{k1*s} * \frac{1}{1+k2*s} * \frac{1}{1+k3*s} \$, where k1 is constant for integrator, R3*Cfb, k2 is constant for FET corner frequency, R2*Cequ, and k3 is constant for output filter, R1*Cout
H(s)=k4, where k4 is feedback factor, k4=\$ \frac{R4}{R5} \$
So, the overall transfer function can be simplified as: A(s)=\$ \frac{1}{(k1*s)*(1+k2*s)*(1+k3*s)+k4} \$
It looks stable to me due to the existence of k4 in denominator. Overshooting is possible, but this topology will not oscillate, at least.

--- End quote ---

Hi group,

I don't agree with the analysis that k3 = R1 x Cout.

Models

I have generated 3 models on the same schematic to make it easier to compare the results.



Vout_1 is a simple model a single pole with a frequency of 1/(2pi x (R1 || Rout) x Cout) but, if Rout >> R1, then Fo = 1/(2pi x R1 x Cout).

Vout is considering the MOSFET and R1 to form a transconductance amplifier. This would be a pure integrator, except for a zero at 1/(2pi x Cout x Rload)

Vout_3 is essentially an op-amp circuit with the same characteristics of Vout, but with a 180 degrees of additional phase shift introduced by the inverting amplifier. The voltage controlled voltage source E1 can be considered to a power op-amp with an open loop gain of 100K. This circuit is recognizable as an integrator with a zero formed by Cout and Rout.

Results



The results suggest that circuit formed by the MOSFET, R1 and Cout is not the same as an R1 x Cout network, because it has a gain greater than 1 at low frequencies.

Regards,

Jay_Diddy_B


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