Electronics > Projects, Designs, and Technical Stuff
Power supply topology - will it work? (Control theory, stability)
Yansi:
Again at the bench! Thank you guys for discussing the problematic in such detail. Although I do not understand everything now, I might in the future, when I will grow up and be like you guys ;D
I might have not specified in the beginning, that the whole "supply madness" is a part of my project designing a usable "high voltage" regulated supply 0-400V 0-300mA. There aren't many of those real usable designs on the web, so I accepted the challenge to make one. Sorry for not being clear from the beginning, but originally I have asked due to my colleagues concerns about the topology might be inherently unstable - which I am glad is not.
I do understand, that there are many ways to design such supply, but please respect this is my first (or not exactly first, but first which might work) trial to make such PSU, so some compromises have to be done :)
salbayeng: Thank you for the tip to use cascode! I might try that one in the next better prototype. Gate-Source zener diode will also be added, together with other at least two protection diodes in the circuit (the schematics posted here are nowhere near complete, more like describing the principles of the regulation loop)
Kleinstein: Yes, current limiting is what I need to do next. Or before I do, I need to think out how to merge the voltage and current control loops.
Could you please help me evaluate my ideas for merging the control loops?
One of the usual ideas behind current limiting seen in many other circuits is that the current regulator opamp drags the voltage regulator reference input down, through a diode. However I can't use that, as I would need the opamps output to go negative (one diode drop) to be able to drag the ref voltage down to zero.
The idea behind using the inverting amp as a voltage divider was that only unipolar supply voltage is required. Therefore I cannot use the "ref voltage clamp" technique, as I can't go negative, as described above.
What I thought was I could sum the opamp outputs through diodes and "hang" the gate with a resistor (or possibly current source) up to the positive supply. The schematic is below, image A. This circuit has a dangerous flaw: To be able to control the mosfet fast enough, the source current through Rg might be high (some tens mA). That means the diode voltage drop will be quite high and also the opamp output saturation voltage adds up. This means the gate voltage cannot be brought directly to zero, but only about a volt or so. (one diode drop + opamp sat.)
I think better solution might be to use the B variant on the schematic below. The diode drop is compensated by the Vbe of the transistor. So when the cathode of D1 or D2 is at GND level, the emitter will be very near GND too. Also the current through the diode and opamps output will be low, resulting in low saturation voltage and the widest range of gate control voltage down to almost zero. The emitter resistor Re might be also replaced by a current sink: A simple two transistor one (adding few hundred mV of drop) or likely just JFET as a current sink?
What do you think about this idea? Is it a good enough solution or are there similarly simple but better ones? How will this influence the control loops?
Thank you!
Yan
//EDIT: Just a thought: A diode accross E-B of the emitter follower might speed up gate discharge, as the opamp sink current ant I(Re) current will sum.
Kleinstein:
Both ways for combining voltage an current regulation can work. For most MOSFETs a gat voltage in the 0.7 V range will not turn on the MOSFET. This is especially true for older types suitable for linear operation. The version with extra emitter follower also work an has the advantage of slightly more driving power for the gate capacitance. So it can slightly speed up the output stage, which usually is good for the control loop (usually no changes needed, but might be possible for faster regulation). Likely the voltage range for the gate voltage is quite limited - so the resistor can be good enough.
If needed one could add an additional drop, so that the OPs need a higher voltage to turn on the output stage.
For the control loops one might consider moving the capacitor from the OP output to the source resistor - this somewhat limits wind up if current control is active and thus speeds up the switch over from CC to CV mode.
The extra cascode stage is not that important unless one wants a really fast regulator. One can als o use a similar configuration to combine two transformer taps, to reduce heat production: use the one FET or BJT as a cascode for the higher voltage tap and use a diode to provide power between the two power transistors.
Yansi:
Thank you for confirming. I will modify my circuit on veroboard and test.
Sure 1V should not open it, but still I don't quite like it, so I came with a better solution.
I think I will not be bothered with extreme switch over speeds from CC to CV in this case. I think the best solution would be to use similar circuit like in the LM12 datasheet, where transistors are used to switch in or out the oapmps local feedback RC cell. But it might be an interesting thing to test or compare, if there will be any improvement (remember we might have some or more capacity on the PSU output, so extreme switch over speeds aren't possible either)
I might use the cascode configuration in another project. If I am not mistaken - Keithley 2600 series SMU use similar cascode arrangement, aren't they?
This time I have designed a stepdown preregulator, no transformer taps switching. The project goal was to use cheaply available transformers 400/230V (connected in reverse) we use here often in industrial control systems to obtain 230V control voltages from 3ph power systems where connecting a load between phase and earth is not possible (like 4 wire only 3ph supply after an RCB). These transformers can be bought like really cheap and are safe, usually double insulation rated.
Kleinstein:
The circuit in the LM12 data sheet looks strange / interesting, somehow using the transistors in revers too. I am not that sure if this way can easily be used for this topology. Usually current regulation is relatively easy in this topology. Somewhat opposite to the emitter-follower form, where voltage control is a little easier, but current control can be hard.
The output capacitance is not that large yet so one might still want a reasonable fast transition to keep overshoot within bounds. If you look at regulators using the emitter-follower topology for comparison, the visible output capacitance might be smaller, but quite often there is some more hidden in the circuit. A slow responding current limit might have a similar effect as some 1000 µF of output capacitance.
There is also an easy option to add just 1 or 2 diodes as a kind of shunt regulator to provide something like a -.6 or -1.2 V negative supply for the OPs and regulator circuit, as long as there is only little current drawn from it. So keeping it single supply might not be the highest priority.
The Keithley SMUs use some kind of cascode type circuit to use more than one raw voltage / transformer tap, but also some parts to divide a high voltage over several devices to get better SOA. But things get more complicated as the SMUs have a 4 quadrant output stage. This type of regulator is more like 1 Quadrant, maybe extended to 2 Quadrants if one wants to.
Yansi:
I have actually tried the transistor-switched comp. cells in one of my projects few months ago - it also was 4 quadrant +-3V +-5A supply I tried to design for local university, but before I finished a PCB, they changed their minds and didn't need anything. It worked quite well.
The design goal is really not to use *any* negative supply at all. I don't like this in PSUs - one have to careuly look for unwanted glitches in the circuits, where one rail ramps up or dies sooner or later than the other. Sometimes even extra protection circuits are required to get rid of such glitches. So this time I'd try without any negative rails if possible.
I will try the "B" variant of the merging circuit. The gate-ground voltage measures about 5.4V at 27mA load (just took random measurement what to expect there). Interestingly - I consider the 4.8V gate-source voltage rather on the high side while the mosfet being just barely opened. But who knows, maybe a higher threshold voltage.
I will use the B variant for now, without the CCS, just gate-ground resistor. I will try with 30mA drive current (will be sufficient?), meaning I need about 150ohm resistor down there.
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