Electronics > Projects, Designs, and Technical Stuff
Power supply topology - will it work? (Control theory, stability)
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salbayeng:
Ah found it,  the OP says 150mA,  (for some reason I was thinking it was in 5-15mA range???)  OK an upper bound might be 1W or 3v at 150mA = 20ohms.
Probably don't need the "surge" feature as 150mA will charge the cap fast enough.??

One could probably achieve rough local current limiting by using a small NMOS (2n7002) to drag the big MOS gate down.  It's threshold is ~ 1.8v , so with a 10ohm source resistor, current limiting would occur around 180mA, (and you could put in a high impedance RC network if desired for "surge" protection),
For more accuracy, substitute a TL431, it will pull down the big MOS gate at 2.499v across the source resistor.  Although if one were using an opamp for CC mode, the local current limit would be superflous,  design effort might be better spent on thermal protection.

I can see how the boost cap for the PMOS would be useful now, with 150mA load current, a capacitance of 10uF might be required for adequate filtering so the PMOS may need to handle 10-20mA during reference changes to constrain the slew rate.
T3sl4co1l:
Note that the source resistor contributes to loop stability, because it sets the maximum transconductance of the pass transistor.

Tim
Yansi:
Thank you guys for more detailed analysis of the circuit. I have been few days quite overcome by my other work, so sorry for a small drop in communication. Hopefully I will draw the full schematic soon, so we can discuss a bit more in detail about the whole circuit.

Yes, the preregulator will have a filter attached on the output, you will see from the full schematic. (however there are still some unknown, what capacitances will be used there).

You think those 50V reserve accross D-S is too much? Well, cannot say much about that. Just wanted to be sure there is enough headroom for the voltage reg and also that the negative undershoot of the preregulator can not cause problems (currently 6V undershoot - but I think no easy solution for it, as the negative slope of voltage is given by the discharge rate of prereg output cap and windup occurs in the integrator in the control loop - please see my last post)

The overall goall is to make a decent (but not overcomplicated!) regulated PSU of 0-400V 0-300mA. As the current circuit seem very much viable, should not be much problem to scale it up for that goal. Bigger mosfets are on the way, so I might have them on friday.
I have chosen easily available and quite cheap IPW90R1K0C3 from Infineon, will be two of those devices in paralell (to increase SOA withstand capability of the linear stage against direct shorts or any wild overloads, where the mosfet will see full voltage accross D-S and full current for a moment). The source resistors should be left the same value, 22ohm per mosfet (11ohms together, so same drop at full 300mA output as we had so far with 150mA). But I might drop the value down if necessary.

By the way, what is better for the control loop? To have bigger or smaller source resistance? With higher resistance the mosfet should behave more like a current source device, more linear than with very small source resistance. Also should be better for a "SNR" side of thing (offset voltages will hide better if the signal value is higher, do not want to sense milivolts there). There is only half a watt being lost (0.15 squared times 22), 1W together both shunts at full output current. I don't thing it is a big deal, for a 120W output supply, do you?

I will use some constant current load on the output, to (maybe? over-)compensate the current leaking through the D-S resistor divider (feedback for the prereg).

Note that the 800K feedback resistor is actualy 330+470 K in series. Shall withstand 400 volts together easily.

Yansi
T3sl4co1l:
More source resistance is better.  The maximum value is [V(opamp-supply) - Vgs(th)] / Iout(max), so in principle you could use a high voltage amp (Vsupply as high as Vds(dropout), say?) and make it stupidly linear.

But really, more than 10V gate to common isn't important.

Source resistor also affords you short-circuit, reverse and surge protection.  Put a zener from common to gate, and the transistor will limit current on its own, no matter how suddenly the output gets pulled around (say from connecting up a fully-charged electrolytic backwards, or several accidentally stacked somehow).

Putting active current and voltage limits on top of that makes things all the sweeter. :)

(You actually want the protection network a bit more complicated than a single zener, since reverse surge would do nasty things to the simple connection above.  A diode or zener at G-S, and a series resistor, in the common/ground return path I'm thinking, would be best.)

Tim
Kleinstein:
A relatively large source resistor is needed to make the current sharing work well. The 22 Ohms are well large enough. The gate (especially gate to drain) capacitance might be a considerable limit to common mode rejection, e.g. ripple of the switched mode stage. So one might consider the earlier mentioned cascode circuit might be worth a thought with higher power (two quite large MOSFETs) - to a certain degree this an alternative to a more power full gate drive.

The drop on the linear output stage does not need to be much larger than the undershoot / drop of the pre-regulator. So something like 10 V should be enough. Overshoot of the pre-regulator might be relevant for worst case power loss for the FETs.

I am not that convinced the choice of MOSFET is good - this are modern fast switching types, that tend to have a not so well suited SAO. Though the high voltage helps. The more natural choice would be old types.
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