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Power supply topology - will it work? (Control theory, stability)

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Yansi:
Look carefuly: The mosfet that I have chosen is DC rated. I don't know a single one "older" type of high voltage mosfet that has a DC SOA. Ant the SOA limit is only power limit in reality (no second breakdown as BJT ones have) - which is what one would expect from a mosfet that is rated for DC linear operation.

Kleinstein:
The problem with modern MOSFETs is that they do have an effect similar to second brake-down, it just got a different name. So if the curve only shows the a simple power limit, there is a good reason not to fully trust that curve.  The old first generation MOSFETs usually did not have this extra limit, but modern types usually have. However I also do not know a suitable type.

It is well possible that FET could work. Under normal conditions it will not see more than 50 V for more than about a few ms (if at all). Also many of the MOSFETs can survive quite some power, but one never knows. Especially many modern FETs are not made and tested for linear operation, but for fast switching and low R_on from a small die.

Yansi:
If the SOA states only the power limitation, there should not be any other limitation. If there is, the manufacturer is lying and it would be a big trouble for them then.

Also not much mosfets are with DC SOA today, so if you find one that is, I think one could rely on that.

T3sl4co1l:
SuperJunction FETs apparently are "free of" 2nd breakdown.  Which is remarkable, as they have the highest current density among MOSFETs, too.  I haven't seen any articles discussing this aspect of the technology.

As far as I can tell, there was only ever one reason why MOSFETs claimed to avoid 2nd breakdown: they sucked.  Until recent advances (Trench, VDMOS), the current density was always significantly lower than that of BJTs.  The gain is lower, too.  The power levels required to cause 2nd breakdown would've been perhaps 10 times that for a contemporary BJT, or even more -- nothing that could ever possibly be achieved, given the limitations of the package.

There's no such thing as "free from 2nd breakdown", only that it be inaccessible within package dissipation limits.

Which, by the way: I don't think I've ever seen a SOT-23 MOSFET with 2nd breakdown limits.  There's just not enough heat flow through the package to cause a gradient in the die!

IGBTs have even higher power densities, with the sensitivity (gain and tempco) of BJTs.  Though, remarkably, I have seen a few datasheets (not many) which show power-limited DC SOA.  I find this suspicious, and wouldn't recommend using them that way without extensive qualification testing.

I have no problem with using MOSFETs where the SOA says they're okay.  Qualification is always good, of course.

Related: I tested an IRF740 to have RthJC something like 60% of the datasheet (maximum) rating!  Those old chips have one thing in common: huge dies.  In comparison, a brand new Fairchild FDPF6N60 (I think) expired damned close to its ratings, like 5% over.  Tiny die!

Tim

Yansi:
Oh yea, that's why I fuckin hate those new "150A" mosfets in DFN (and similar) SMD packages, where the claimed cannot be ever reached in real applications.

IRF3205 and IRFP4110 is still the top of quality products I have ever used. (And those old IRF540 and similar are still the good ones). Huge dies!

BTW, the courier was almost unimaginably fast, they delivered me the parts today (although I expected tomorrow at best). So now I have the 90R1K0 Infineon mosfets prepared for some more weekend toying. Also bought some STF3NK80Z for the prereg, as those STP6N80K5 I have used so far in the prototype (both in the prereg and linreg part :-) ) to be too good for the prereg, will try the cheaper ones. Should do good enough too. (Also I like the fully plastic body more for this application)


As far as the prereg voltage setpoint over the drain-source of the linreg: Yes, I might lower the voltage, I admit those 50V might be more than what is really needed. (it is an easy mod, also I plan to leave a trimpot for this in the final design).

Y.

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