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Power supply topology - will it work? (Control theory, stability)
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Yansi:
Hello!

Just an interesting topology useful for high voltage power supplies, requiring only asymmetrical aux supply and opamp capable of working with (near) zero voltages (like 324 or 358 or any RRIO one). The question however is - will this one work?

A little description: Referencing the aux supply to the positive output terminal has a big advantage of driving the mosfet gate, no high voltage amplifying  stages are needed.
As the feedback voltage is negative related to the aux supply reference point an inverting amplifier is used to both scale the voltage down and change polarity to positive.
Then a regulator is used to control the mosfet, based on the positive feedback voltage, comparing with positive reference voltage, related to aux supply gnd.
R1 is used as a current shunt.

The regulator is the most difficult part: How should I determine, what type of regulator (R and C configuration) and compensating circuits shall I use so I can make the thing stable, even with added capacitive loads on the output?
Note: The integrating regulator might not be what the circuit really requires!

Schematic is attached.

Thank you for helping me  :-//
Yan
Kleinstein:
In principle this type of regulator works. Many of the HP lab supplies use this type. The nice thing is that you can use essentially the same regulator part for different voltage levels - from low voltage like 3 V up to 100s of volts with suitable power transistor.

The regulator might need a resistor in series with the integrating cap and an output cap with sufficient ESR or series resistor. One can even simplify the circuit by using the non inverting input for the feedback (and add a positive reference current).

Today one would use a simulation (e.g. LTspice) to check.
Yansi:
Yes, I have also found later the non-inverting input can be used, by supplying a positive reference current. One opamp less, however this has the advantage of an high impedance reference input. (One would have to use an extra follower to supply the reference current, if high impedance control voltage input is needed).

What do you mean by "sufficient ESR"? User of the PSU can always connect a big low ESR cap directly on the output terminals.

How would you estimate the compensation values in a specific circuit design? (or to make a simulation? First estimate will still be needed)

Do you know any schematic I could reference to?

Thanks,
Yan





T3sl4co1l:
Note that, since MOSFET source, and error amp, are referenced to +out, this is a negative voltage LDO (open drain output).  Which means, a better way to draw it would be... *waves hands around erratically*.  Well, you know.

You don't need ESR for stability of this type of regulator, but you do need a loop with enough means of control to realize that -- usually using the transistor as a controlled current source (which it is anyway, regardless of how you treat it -- the drain output in the linear range (FET current saturation) is CCS), with feedback to control that current precisely (rather than the quadratic to exponential dependancy on Vgs that a naked transistor has), and feedback around /that/ to set the actual output voltage.

ESR helps because of adding a zero in the loop response; ideally, ESR * C is selected so that the zero falls near fT (i.e., loop gain ~= 1), so as to improve phase margin.

Tim
Kleinstein:
For this type of regulator the ESR of the output cap helps to get stability. Often something like an 0.1 - 1 Ohms ESR can work to provide enough damping in the 100 kHz range. Even with an external low ESR cap this damping will persist. With enough low ESR capacitance the ESR might not be needed anymore. However a capacitance without ESR can worst case loose its effect with an inductive load. The ESR has a similar function for stability as the relatively low output impedance of the classical emitter follower stage.

For the fist estimate of the tuning loop one can start very slow and than adjust in the simulations.
A good point to look at is the output impedance in the 10-100 kHz range. Something like 1-10 Ohms is realistic unless you have a very slow of fast output stage.

In the simulations looking at the output impedance (use AC source as a load and look at output voltage) is a good way to check for stability with different load conditions. If the output impedance has less than 90 degree phase shift everything is stable, no matter what (passive, up to +- 90 deg phase shift) load is used. One still needs to check transient response for unpleasant surprise of nonlinear effects from saturation or similar. Linear stability is required but not sufficient for good regulation.
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