Electronics > Projects, Designs, and Technical Stuff
Preregulation of a linear bench PSU
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not1xor1:

--- Quote from: Kleinstein on December 27, 2018, 12:39:08 pm ---If the MOSFET is turn on hard with capacitors on both sides, there can be quite some peak current spike. The thread started with the problem of high current spikes that looked like up to 100 A.
The current spike may be OK for the MOSFET if it does not get much lager. However with so large a current there is noise and also possible voltage spikes.  I would be more worried about loss at the capacitors and also some of those peaks coming through to the output. The audible noise is a second problem. On fast load changes (short to open, CC to CV) there could be also quite some current spike - though usually only at a low frequency.

For the switching there are several options: Triac before the transformer, relays before the rectifier, SCRs as part of the rectifier and a MOSFET behind the rectifier. The switching can be hard between taps or in some cases also with a continuous output. The circuit from the beginning is turning on in zero crossing and doing some continuous adjustment. The circuit does not look so bad - I would expect even more current spikes from the continuous adjusting  SCR version.

--- End quote ---

The single tap switch uses just one capacitor. The current spikes are the usual current spikes you get when you switch on a transformer or when you switch transformer windings via relais. Nothing different, no noise, no overshots.
The only problem with my first draft was that in some cases both mosfets were on. That is easily solved by switching on zero crossing.
In the circuit I'll discuss tomorrow I also enforced fast switch off on both mosfets, just to make that even safer.

You get instead huge voltage spikes when you switch the mosfet off as soon as the capacitor gets to the required voltage, because the mosfet and the inductance of the transformer work like a stepup switching circuit.
You can only mitigate a bit the problem by slowly switching the mosfet off, but at the expense of more power dissipation.
And yet some more power has to be dissipated by the transformer and a bleeding resistor and or a TVS.
not1xor1:

--- Quote from: Kleinstein on December 27, 2018, 07:33:17 pm ---For the circuit from  not1xor1 it still depends on how the switching is controlled. It could be switching with hysteresis and thus not so often or it could still be fast control within a line period.

--- End quote ---

hysteresis plays no useful purpose here because even if the comparator would "misfire" at 50 Hz (i.e. every other cycle) the capacitor voltage would be higher than the center tap voltage and that alone would prevent the center tap mosfet conduction.
I'll try to show that tomorrow...
Atom:

--- Quote from: not1xor1 on December 27, 2018, 08:14:39 pm ---
hysteresis plays no useful purpose here because even if the comparator would "misfire" at 50 Hz (i.e. every other cycle) the capacitor voltage would be higher than the center tap voltage and that alone would prevent the center tap mosfet conduction.
I'll try to show that tomorrow...

--- End quote ---

i'll look forward to it. :-+
not1xor1:

--- Quote from: Atom on December 27, 2018, 11:29:49 pm ---
--- Quote from: not1xor1 on December 27, 2018, 08:14:39 pm ---
hysteresis plays no useful purpose here because even if the comparator would "misfire" at 50 Hz (i.e. every other cycle) the capacitor voltage would be higher than the center tap voltage and that alone would prevent the center tap mosfet conduction.
I'll try to show that tomorrow...

--- End quote ---

i'll look forward to it. :-+

--- End quote ---

sorry... I've been too busy yesterday... anyway here it is



The circuit uses a couple of BJTs to detect when the 100Hz (or 120Hz) rectified AC gets to 0V. Then on the collector of Q6 you get a short (compared to the AC line period) positive pulse.

Each positive pulse then gets to one input of the two NAND gates U5 and U6.
Depending on the status of the voltage comparator U2 output (and inverted U1 one) the positive pulse becomes a negative one at the output of either U5 or U6.

If the flip-flop is not yet in the required status, the pulse changes that, switching off one of the mosfets and leaving the other get to the on state.

The circuit has been simulated with LT1013, LM358, LM393 (with pull-up resistors on the output) but should work with any rail-to-rail I/O opamp and probably with most single supply one. I also added some hysteresis as suggested by Kleinstein to reduce unneeded tap switching.

It looks like the peak current on switching from the low tap to the high one gets at once about 4 times higher than the full load peaks and then gets back to normal in 3-4 cycles. The output voltage ramps up at a speed of few milliVolts per µs so shouldn't cause too much trouble for the voltage regulator stage.

Possible improvements might include usage of N-MOSFET (greater choice, low cost and low Rds-on) and switching them off via an optocoupler.

With few modifications, including back-to-back MOSFETs switches and a bit more complex logic, two transformers and bridges (or a single one with dual split winding secondaries) might be stacked in series to get 4 voltage levels.

I'm also attaching the .asc file (see below). Apart from CD4000_v.lib and logic gates symbols it uses just LTspice stock components.

The following screenshots show the logic signals:





These show the MOSFETs current and source-gate voltage:











These last two screenshots show the peak current and voltage spike when switching from low to high voltage.
The simulation has been run with a huge 47.000µF capacitor and a load of 10Amps.




blackdog:
Hi,

If you only need one switchpoint than take a look at this schematic, it uses a Schottky diode and a PowerMOSfet.
www.bramcam.nl/Diversen/CO-2016-PSU.pdf

The whole Power Supply Page on Circuitsonline: https://www.circuitsonline.net/forum/view/130041/1#highlight=voeding+co+0

And this is a page on Circuitsonline with my customized version of this power supply: https://www.circuitsonline.net/forum/view/131554/1#highlight=voeding+co%200

I don't think it's too difficult to adjust the circuit around the transformer, the extra Schottky diode and the PowerMOSfet for 5 to 10 Amps.

But beware, the peak currents at large electrolytics can rise considerably, which is normal with large capacitances and large output currents.

Kind regards,
Bram
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