| Electronics > Projects, Designs, and Technical Stuff |
| Programmable Electronic Load, 0-5A |
| << < (7/9) > >> |
| sundance:
Is there a reason you used Vref as supply voltage (Vdd) for your DAC instead of 3.3V to have a little headroom for the output opamp and to take some load away from Vref? (I am by no means an expert, just curious...) |
| Kleinstein:
The low VDD for the DAC is likely not a good idea. In addition to the problems already mentioned it could cause trouble with the interface to the µC, if there are high voltages. So Vdd should be more likely the µC supply with some RC or LC filtering. The amplification and level shift after the DAC does not work this way. The OPs inputs are swapped. The OP4277 is a slightly odd and expensive choice, as it's made for relatively high impedance source. The power stages likely need to be separated a little anyway to have space for the heat sink a quad OP is also odd. Using a parallel / series combination of 0.1 Ohms resistors is prone to add extra copper resistance and thus not really accurate. Also many small resistors close together, especially in SMD form factor have difficulties in getting the heat away. So putting 4 SMD 250 mW resistors may be more like a 500 mW resistor. With presumably the same resistors used, it does not make that much sense to have a separate shunt for the total current. With some care in the layout, one could just combine the average voltage of the resistors at the current regulators. A separate shunt for the total would make sense, if one good quality shunt is used. The power stages could than also use simpler resistors and even simpler OPs, with one more OP to make sure the overall current is right. To really warrant a 16 bit DAC the shunt should be really high quality and not too low in power, to avoid errors from self heating. So for a 5 A total current this could be something like 0.05-0.1 Ohms, good for 10-50 W. So likely a 4 wire shunt with it's own heat sink. It is not unusual to use a shunt only at 1/10 or less of the rated power to limit the heating effect. If one plans using lower currents as well one might consider a choice of 2 shunts, depending on the range. |
| JeanLeMotan:
--- Quote from: Kleinstein on March 08, 2019, 10:04:17 am ---The low VDD for the DAC is likely not a good idea. In addition to the problems already mentioned it could cause trouble with the interface to the µC, if there are high voltages. So Vdd should be more likely the µC supply with some RC or LC filtering. --- End quote --- I took that idea from the datasheet of DAC8571: https://datasheet.lcsc.com/szlcsc/Texas-Instruments-TI-DAC8571IDGKR_C60535.pdf --- Quote from: Kleinstein on March 08, 2019, 10:04:17 am ---The amplification and level shift after the DAC does not work this way. The OPs inputs are swapped. --- End quote --- This is embarrassing. I simulated the thing and then added the schematic in easyeda quickly before going to work. Attached is the corrected schematic. --- Quote from: Kleinstein on March 08, 2019, 10:04:17 am ---The OP4277 is a slightly odd and expensive choice, as it's made for relatively high impedance source. The power stages likely need to be separated a little anyway to have space for the heat sink a quad OP is also odd. --- End quote --- The other opamps I considered are: TL071/2 (too noisy?) TL051/2 (is this good enough?) OP27 OPA227 Which one do you recommend for this? Am I missing any obvious option? --- Quote from: Kleinstein on March 08, 2019, 10:04:17 am ---Using a parallel / series combination of 0.1 Ohms resistors is prone to add extra copper resistance and thus not really accurate. Also many small resistors close together, especially in SMD form factor have difficulties in getting the heat away. So putting 4 SMD 250 mW resistors may be more like a 500 mW resistor. With presumably the same resistors used, it does not make that much sense to have a separate shunt for the total current. With some care in the layout, one could just combine the average voltage of the resistors at the current regulators. A separate shunt for the total would make sense, if one good quality shunt is used. The power stages could than also use simpler resistors and even simpler OPs, with one more OP to make sure the overall current is right. --- End quote --- Understood. Will try to find better resistors for this. Will reconsider this stage entirely. Can you recommend an existing design for this? |
| aiq25:
I also think you should use a more powerful current sense resistor and not parallel or series too many. It's also better to have power resistors in series to dissipate more heat because at least then if you have a failure you will know since the circuit will be open, versus if it's in parallel and one fails you necessarily won't know (although for this project you can have SW in place to detect and compensate). I have done some high power current sense measurements for work and used these series of resistors from TT (high power version) and Vishay (they are not cheap but can handle tons of power): https://www.mouser.com/datasheet/2/414/LRMA-1528276.pdf or https://www.vishay.com/docs/30100/wsl.pdf I used two in series, with value greater than 50mOhm. You do have to be careful with the PCB layout to place them right next to each other. Not sure if you aware but resistors have a linear de-rating in power (usually above 70 degC) (as mentioned by others), so take this in account when doing power calculations. For total current measurement you can consider Hall-Effect based current sensor, like the ACS712 (but it can add significant cost). I know it's a popular choice to have four different FET's and op-amps but I think without fast control loops/feedback you can easily run into issues where you will not share the load between different FET's equally. If you oversize the FET's this is not a concern though. This is where the Scully approach differs, I don't know if he's implementation is the correct way but you don't see this issue with a single sense resistor concept. |
| JeanLeMotan:
After spending one day trying and failing to stabilize a 4 MOSFET load, each with its own balancing opamp and an outer opamp for current control, I gave up and went back to smth simple: a single beefy MOSFET that can do more than 100W continuous: IXTH110N10L2 I also fixed the voltmeter. It was using only half the range of the ADC. Now it correctly swings using a differential output amp - so LOAD+ and LOAD- go from 0 to 3.3v in opposite phase for an input voltage of +/- 35V, with an ADC common voltage of 1.68V referenced from the voltage reference. Hope that makes sense. I marked on the schematic some voltages that I think are interesting. For the current shunt I went with 4 big SMD 0.1 ohm resistors in series-parallel. They have a temperature coefficient of 50 ppm/℃ which I think it's good enough for the application. I already layed them out on the PCB with cooling in mind - so they all have big copper pours on both layers, stitched with lots of vias. For the opamp I went with a OP4177 quad as it's cheap and seems pretty good. I need 6 of them in total (7 if I do the reverse polarity with a mosfet) so I really want quads to reduce PCB clutter. The last step is to simulate and compensate the load opamp as the IXTH110N10L2 MOSFET has quite a big gate capacitance of several nF. I will include a SD-card slot on the board together with a ESP32 devkit footprint so that it's all-in-one. The SD card will be used for logging data. Schematic attached (and available here: https://easyeda.com/jeanleflambeur/electronic-load) Questions: Does the biasing opamp U9.3 makes sense? Its purpose is to lower the min voltage a bit to compensate for any voltage offset U9.1 might have. It takes 0 - +2.048V and outputs -102.4mV - +2.048V which is then divided to -26mV - +512mV which should give me a range of 0 to 5A for a shunt resistor of 0.1 ohm. Does the voltmeter differential output make sense? The idea was to use the full range of the ADC which needs +/- 3.3V with a Vcm of 1.65V. Thanks a lot! |
| Navigation |
| Message Index |
| Next page |
| Previous page |