Author Topic: Project Yaigol: Fixing Rigol scope design problems.  (Read 78601 times)

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Offline Bud

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Project Yaigol: Fixing Rigol scope design problems.
« on: March 09, 2016, 08:18:34 pm »
Part 1. Preface

This write-up was inspired by an earlier discussion about rigol DS1000Z series oscilloscopes, when a problem was discovered with the master clock oscillator in that line of scopes. The problem was caused by incorrectly selected PLL (phase locked loop) component values and strange programming of the PLL chip that could not be reasonably explained. Details can be found starting from this post by MarkL here:

https://www.eevblog.com/forum/blog/eevblog-683-rigol-ds1000z-ds2000-oscilloscope-jitter-problems/msg552777/#msg552777

Basically, the PLL was wobbly instead of outputting a stable clock signal. Because the clock drove the ADC chip, the jitter was directly affecting the ADC sampling. MarkL took a few screenshots of the PLL spectrum using his spectrum analyzer and the clock looked plain awful. There was no explanation or justification to such poor PLL clock design other than incompetency of the scope manufacturer and lack or absence of quality control on their production line. 

The manufacturer then issued a firmware update that bandaged the problem but did not eliminate it entirely, partially because a proper update required changing the hardware – the PLL loop components on the PCB. The second reason was of the same nature as the one I discovered during this project, and also required replacing the hardware components – more information on this will be provided later in this article.

After that and being still puzzled by the foolishness of this problem in DS1000Z scopes I decided to check  my DS2072A scope. I am sure you’ve already guessed what I found. The answer is yes, same problem with the PLL clock existed in DS2072A. The 1GHz PLL clock was modulated like hell and sometime failed completely, generating plain narrow band noise. I decided to check it a little bit more and see if I can fix the PLL. At the time I did not realize this will become such a sizable investigation which I eventually named the “Project Yaigol”.

During my investigation I observed (and you will see it for yourself as you read) that the manufacturer of these scopes could not make oscillate the circuits that should oscillate, but was very successful in making oscillate circuits that should not oscillate. For that reason I called that company “the masters of reverse oscillation”. To integrate this honorable title into their name, the R letter was flipped. The backwards R is written as “Ya” and pronounced  “ja” as in yacht or yack. Hence the name of the project: “Project Yaigol”.  ;)

In this article I will provide information to DS2000 scope owners how to fix the PLL and how to fix other not less ridiculous problems I found during the investigation. Same as I, you may not at first believe such stupidity can happen. The bad news for you is the problems are caused by fundamental reasons, i.e. not by component tolerances but by bad design decisions as well as by programming that is incoherent with the underlying hardware. The good news is that not much effort is required to perform the fix. Still, it involves SMT work so you have to have appropriate skills and tools to do it. I will be giving instruction in the article as I write and I will summarize it all together in the end, so If you do not want to read the complete article you can jump straight to the last part for a fix guide.

I began looking into it somewhere in April 2015 and it lasted until late June, making notes and taking screenshots. This information has been sitting and waiting since then but I kept postponing writing a post because of other things. I will see if I can do it now and I am going to break it to parts organized by topics. Still may take a couple weeks to complete so please bear with me. Hope this will be to you both entertaining and useful.

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #1 on: March 09, 2016, 08:20:17 pm »
Part 2. The PLL

Please use the attached PDFs. I had to split to two files because of attachment size restrictions. I may convert to HTML for online read when have time.
« Last Edit: March 14, 2016, 07:02:16 pm by Bud »
 
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Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #2 on: March 09, 2016, 08:23:10 pm »
Part 3. The PLL Power Supply

Please use the attached PDF
« Last Edit: March 16, 2016, 05:54:20 pm by Bud »
 
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Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #3 on: March 09, 2016, 08:24:31 pm »
Part 4. Other Power Supplies

Please use the attached PDF.

Additional artefacts are here:
https://www.eevblog.com/forum/projects/project-yaigol-fixing-rigol-scope-design-problems/msg897887/#msg897887
« Last Edit: March 18, 2016, 02:36:50 pm by Bud »
 
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Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #4 on: March 09, 2016, 08:26:34 pm »
Part 5. Front End performance

This part deals with the input stage of the scope, i.e. signal path from the BNC jack on the front panel through to the ADC input. Information presented here may be useful for troubleshooting/repair or learning. There is no design errors fixing in this part.

The two scope channels are identical, this is a photo of one channel:

DS2072A_input_stage.jpg


The input BNC jack is at the bottom, together with a relay that connects a 50 Ohm terminating resistor and the resistor itself. The signal travels up through two attenuator stages, passes through a FET transistor buffer, a variable gain amplifier IC with switchable bandwidth in the top part  of the photo and exits on the top left via an ADC differential buffer IC. The signal then is routed straight to the ADC input pins.

Same as with the PLL chip, Yaigol made another foolish attempt to disguise the IC part numbers by lasering them off. But EEVBlog is here to uncovers these secrets for you. The VGA with controllable bandwidth is Texas Instruments LMH6518 900 MHz, Digitally Controlled, Variable Gain Amplifier, and the ADC driver is LMH6552 1.5-GHz Fully Differential Amplifier from the same company.

Gain_stage.jpg


DS2072A can switch input impedance between 50 Ohm and high impedance. However it also has a stupid bug causing the scope forget it was on 50 Ohm between power ups. You work with an RF circuit, you turn 50 Ohm input On, do you stuff, power off the scope for the night, come back couple days later, power it on, measure your circuit again and ...  :wtf:  the ends do not meet. Perhaps need to turn 50 Ohm termination? You go to settings, hmmm....  it shows 50 Ohm is On   :-//  , unless you realize you need to cycle the setting to get 50 Ohm termination back.  :rant:  The stupid thing tells you it is on 50 Ohm whereas in fact it is not. I have not tested if the bug was fixed in the last firmware. It was not obvious in the earlier firmware either, I could not understand a pattern how/when that happened, it did not happen every time.

The following is a VNA screenshot of input impedance on 50 Ohm setting, Yaigol vs Tektronix 2467B 400MHz analog scope. Yaigol traces are red/green, Tek is blue/yellow. Above 100MHz Tek has a better 50 Ohm compliance.

S11 Yaigol vs Tek.jpg


The following is a VNA screenshot of Yaigol on High Impedance setting. Input impedance is capacitive with Cin about 18.5pF.

S11 Yaigol high impedance.jpg


The attenuator has two stages, a reverse engineered schematic is provided below. I cannot guarantee 100% correctness, I did not try very hard, but it gives you an idea about the overall topology.

DS2072A attenuator.gif


Parts annotation in the schematic is arbitrary. I captured the resistor values but did not measure the capacitors. The topology has quite a few frequency dependent correction circuits but if eliminate them, a equivalent schematic at DC can be composed, which was presented in the above picture.
The first stage appears to have 8dB voltage attenuation, the second stage 16dB, which I calculated based on actual in-circuit measurements of a signal passing through the stages - the test conditions are indicated in the above picture at the bottom.

In terms of power the attenuators present 16dB and 32dB attenuation stages, with 48dB of power attenuation when both attenuators are engaged. Interestingly, the overall attenuation of the input stage from input jack to the output of the VGA LMH6518 measured at its output is 32dB. The following VNA screenshot shows attenuation level with both attenuators engaged relative to attenuators turned off. It can be seen that total attenuation of the signal path is about 33dB.

BW limit off with attenuator relative dB.gif


So how come the total loss of the two attenuators is 48dB but we measured only 32dB at VGA output? Apparently the VGA compensates for the missing 16dB loss. This may be kind of stupid, why attenuate and then compensate by amplifying. My guess it is a compromise to have an input stage with wide range of V/Div settings. The VGA chip itself has a variable attenuator and static gain blocks - refer to Fig.57 in the Datasheet. Page 21 of the Datasheet explains how it works together to build a oscilloscope input front-end.

The next stage after the attenuator is DC/AC coupling control circuit (Y214S electronic relay) and the signal splits to AC path via a capacitor and DC path via an IC (that seems to be AD8510) that mixes it with the vertical offset control voltage (bottom part of the following schematic). The composite signal then enters the JFET high impedance buffer. The first stage of the buffer is a JFET N-channel transistor, the second stage is a NPN emitter follower. The buffer topology boils down to two current sink loaded stages shown in the right part of the schematic (you The Art of Electronics aficionados feel free to correct me if I got it wrong).

DS2072A JFET Buffer.gif


The JFET buffer output is wired to the next stage which performs input conditioning magic, i.e. some of amplification/attenuation and the bandwidth control. It is built on TI LMH6518 variable gain amplifier (a link to the datasheet was provided above). This is where your "enhanced" bandwidth lives. It is also the biggest noise generator out of everything else in the analog signal path.

Gain and bandwidth of LMH6518 amplifier is controlled via SPI bus. Gain settings depend on selected V/Div and input attenuator section. The IC provides selectable bandwidth of 20,100,200,350,650,750 and 900 MHz. In Yaigol DS2000 series scopes I guess the first 3 settings are used. So the little beast is capable of some more. I believe this stage also have feeds from the system processor for offset calibration. The amplifier converts single ended input into a differential output and is followed by the ADC buffer amplifier LMH6552 with voltage gain of 2.



Measured bandwidth at the output of bandwidth controlled LMH6518 is shown next, with the 3 bandwidth settings marked. This is a composite image made from 3 separate  measurements with the scope set to 20MHz, 100MHz and Full bandwidth (note we are looking at the hacked scope). The roll-off in the left part of the chart below 3MHz was caused by roll-off of the balun used to take bandwidth measurements and should be ignored.



The 100MHz and Full are not exactly 100MHz and 300MHz, but the ADC driver buffer seems to compensate for it. The following image shows the measured bandwidth of the ADC buffer alone and the combined bandwidth. The overall 3dB bandwidth of the input stage seems to be in the area of 350MHz.



The output of the ADC driver IC goes to the ADC chip via two 47.9 Ohm series resistors.
This completes Part 5 and in Part 6 we will take a look at the ADC.
« Last Edit: March 26, 2016, 10:42:27 am by Bud »
 
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Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #5 on: March 09, 2016, 08:28:06 pm »
Part 6.  ADC performance

Reserved for future updates

For now take look at this post:
https://www.eevblog.com/forum/projects/project-yaigol-fixing-rigol-scope-design-problems/msg907254/#msg907254
« Last Edit: March 30, 2016, 02:39:36 pm by Bud »
 
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Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #6 on: March 09, 2016, 08:29:16 pm »
Part 7. Thermal profile

This section has a few thermal pictures taken with my modified FLIR E4 thermal imaging camera.
The hottest area on the board is the ADC and its surroundings, also spreading to the front end under the shielding can as can be seen in the following pictures:





The ADS chip runs hot, as well as its AVDD voltage regulator:




And even the cooling fan itself is kind of warm:



I also made a few panoramic shots. I had no a proper tripod camera holder attachment, so please excise my crude setup:



It was pain in the butt to make panoramic radiometric pictures from a series of 320x240 shots. I recall I had to combine 8 of them to make one panoramic picture. There were posts in Flir E4 teardown thread and others about procedures and tools but in general it was painful and today I even cant remember what I did and how I did it. But once panoramic radiometric pics were complete it was fun to play with them.

I was feeling bad for the poor ADC fellow, so I fitted a lightweight heatsink I got from Digikey on it. The heatsink came with acrylic adhesive, so no mounting hardware was needed. That dropped the ADC temperature by about 20 degrees C. Here is a few shots before and after installing the ADC heatsink.

no_heatsink.jpg


with_heatsink.jpg


Same but  loaded into FLIR Tools software and with measurements over the hottest spots, which were the ADC, its AVDD NCP1117 LDO voltage regulator to the right of it, and the analog front end -5V LDO voltage regulator in the bottom part of the pictures. Wit no heatsink the ADC ran at 84C. With one the ADC temperature dropped to 62C or something, see the cursor measurements on the right side of the screenshots:

flir_no_heatsink.jpg


flir_with_heatsink.jpg


Some of the attached to this post files are the radiometric files (files with "rad" in their filename). If you have radiometric software you can load and play with measurements and palettes.
I will post radiometric version of the above panoramic files separately because of attachment size restrictions.

I think putting a heatsink on the ADC would allow replacing the fan with a quieter model. A quieter fan would almost certainly produce less CFM volume air flow which I think a heatsink could help compensate by more effective dissipation of heat from the ADC. There were complains elsewhere on this forum the DS2000 fan is uncomfortably loud. I did not have a problem with that as I have much more noisy equipment in my Lab, but anyway, just sharing my thoughts.
« Last Edit: March 17, 2016, 06:02:50 pm by Bud »
 
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Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #7 on: March 09, 2016, 08:30:23 pm »
Part 8.  Getting it right.

FLIR radiometric files of DS2072A board are attached.
« Last Edit: March 17, 2016, 05:53:28 pm by Bud »
 
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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #8 on: March 10, 2016, 08:05:28 pm »
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Offline crispy_tofu

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #10 on: March 10, 2016, 09:06:00 pm »
++1
 

Offline veryevil

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #11 on: March 10, 2016, 11:17:00 pm »
Just bought a ds1054z yesterday!  Subscribed
« Last Edit: March 11, 2016, 12:24:51 am by veryevil »
 

Offline rigrunner

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #12 on: March 11, 2016, 12:51:04 am »
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Offline borjam

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #13 on: March 11, 2016, 12:54:23 am »
Subscribed, got a 1074Z a couple of weeks ago :)

 :popcorn: :popcorn:
 

Offline Siwastaja

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #14 on: March 11, 2016, 12:55:09 am »
Ignored thread due to idiots "+1!!!!!11!!1" bumping it one by one so you always get your hopes high that there is some new content here  :palm:  :palm:
 

Offline AlessandroAU

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #15 on: March 11, 2016, 03:20:33 am »
Can't wait for this. Really hampers using the scope for large ffts with the current pll
 

Offline tino_so

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #16 on: March 11, 2016, 02:56:41 pm »
Looking forward to reading this saga  :popcorn: 

Regards,
Yaigol user.
 

Offline bitseeker

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #17 on: March 12, 2016, 06:33:48 am »
Thanks for investigating this and collecting all the info. Looking forward to the upcoming posts. :-/O
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Online nctnico

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #18 on: March 12, 2016, 08:47:32 am »
Skip the analysis and just post pictures of the fix so people can improve their equipment right away!
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #19 on: March 12, 2016, 11:48:38 am »
Skip the analysis and just post pictures of the fix so people can improve their equipment right away!
And who learns anything from that thinking?  :palm:
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Offline wguibas

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #20 on: March 12, 2016, 12:29:32 pm »
I agree, tell us the fixes, so we can use them.  I think I'll still learn the lesson.  The suspense is killing me :palm: :palm:
« Last Edit: March 12, 2016, 12:35:05 pm by wguibas »
 

Offline bitseeker

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #21 on: March 12, 2016, 02:17:21 pm »
Patience, grasshoppers. Patience. ;D
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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #22 on: March 14, 2016, 01:42:56 am »
Skip the analysis and just post pictures of the fix so people can improve their equipment right away!
And who learns anything from that thinking?  :palm:
You want to assemble your own car? Build your own oscilloscope? At some point you just have to take things for granted and move on to more interesting challenges. Besides that I'm quite sure the fix in itself will explain what is wrong with the PLL design.
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

Offline miguelvp

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #23 on: March 14, 2016, 06:03:47 am »
I'm looking forward this constructive criticism.
Even for those that won't modify their scope, they will learn the limitations of their test equipment in comparison to the modified one.

win/win  :-+
 

Online AndyC_772

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #24 on: March 14, 2016, 09:13:07 am »
Skip the analysis and just post pictures of the fix so people can improve their equipment right away!
And who learns anything from that thinking?  :palm:
You want to assemble your own car? Build your own oscilloscope? At some point you just have to take things for granted and move on to more interesting challenges. Besides that I'm quite sure the fix in itself will explain what is wrong with the PLL design.
Agreed, a scope is a tool for developing other circuits, not necessarily a thing that everyone needs to study in its own right.

Not every dragon slayer also needs to be a blacksmith, even though they might benefit from a sharper sword.
 

Offline nanofrog

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #25 on: March 14, 2016, 10:46:54 am »
Sounds like this took quite a bit of work Bud, so I'd like to say thanks for your investigation and posting the results in advance.  :-+

Looking forward to following the thread as it develops.  :)
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #26 on: March 14, 2016, 07:04:44 pm »
Yes it took a while and unfortunately takes long to get the info to you guys. Sorry.
Just updated Part 2, you can start reading.
 

Offline Wirehead

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #27 on: March 14, 2016, 07:11:24 pm »
Yes it took a while and unfortunately takes long to get the info to you guys. Sorry.
Just updated Part 2, you can start reading.
Nice write-up - interesting!  :-+
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Offline veryevil

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #28 on: March 14, 2016, 07:46:46 pm »
Hi, great work.

With the test pads and the zero-ohm resistors on the bus would it not make sense to remove the resistors and fit a small micro to the bus to program the correct settings? Take the 3v3 from the NCP1117 and have it once set the freq. it could even be tied to the lock pin and monitor that as well?

Thanks again
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #29 on: March 14, 2016, 08:13:40 pm »
Thanks for posting  Bud  :-+
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #30 on: March 14, 2016, 09:10:29 pm »
Really a great job  :-+
Now kill the "bat"  ;)
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #31 on: March 14, 2016, 10:33:21 pm »
Thank you so much for the time and effect that went into this. I can't wait for part 3. Very keen to get the scope working as it should.
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #32 on: March 14, 2016, 11:07:44 pm »
Skip the analysis and just post pictures of the fix so people can improve their equipment right away!

Better to include the analysis so that people can judge the competence and validity of the statements. That will distinguish the statements from the vast majority of unsupported assertions seen on the net.

Anyone wanting to skip the analysis (and jump to conclusions) is then free to do so.
There are lies, damned lies, statistics - and ADC/DAC specs.
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Offline c4757p

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #33 on: March 14, 2016, 11:26:13 pm »
Skip the analysis and just post pictures of the fix so people can improve their equipment right away!

I don't understand this. Clearly the analysis is something he wants to share with us, it seems he thought it was interesting and thought we might as well. I'm not sure if I'm the only one who thinks this, but this "skip the analysis" sounds very rude to me, like he did all this work and you're not willing in return to put up with the way he wants to present it...
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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #34 on: March 14, 2016, 11:53:27 pm »
Keep it up Bud, I'm enjoying the analysis as well. 

Offline jh15

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #35 on: March 15, 2016, 12:10:59 am »
EEV forum is more of a time sink than a video game:)

Just stumbled across this thread and will try your fix after others try or fail.

Now, your wire inductors, are they at right angles? Hard to tell from picture angle. Or maybe they are far enough apart to prevent coupling?

Anyway, good stuff, read it all. I'll also have to do the 50 to 100mhz mod while I'm at it.

What about calibration, will it need a cal lab adjustment after?
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Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #36 on: March 15, 2016, 02:25:00 am »
With the test pads and the zero-ohm resistors on the bus would it not make sense to remove the resistors and fit a small micro to the bus to program the correct settings? Take the 3v3 from the NCP1117 and have it once set the freq. it could even be tied to the lock pin and monitor that as well?

That is right, this can be done. In fact i considered as the final solution and i also done a lot of testing with an external PIC connected to the PLL. That way i was able to try different PLL settings. As i mentioned in Part 2, a configuration with a higher PFD frequency (i tried up to about 7MHz) produced a better clock with less phase nose (>10dB improvement), but in the end i decided to leave the factory programming because of two reasons:

- further improvement in the PLL noise would not have a material effect overall because it would be swallowed by the ADC noise which is the second biggest offender responsible for overall system noise. The first and biggest offender is the front end amplifier, i will talk about it later on in the article.

- not many users would be willing to replicate that solution. What i proposed in the article should be good enough and fairly easy to do and without cosmetically disturbing the PCB.


 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #37 on: March 15, 2016, 02:37:25 am »
EEV forum is more of a time sink than a video game:)
Could not say it any better  ;D

Quote
Now, your wire inductors, are they at right angles? Hard to tell from picture angle. Or maybe they are far enough apart to prevent coupling?

I ended up with them not being exactly at right angle because i tweaked them while watching the SA screen for best result (S/N ratio). Making them by hand i would not know the exact inductance value. If they were SMT parts i would mount at right angle in order to minimize change in the part's nominal inductance. The ADI datasheet formula says should be 3.18 nH so we want about 3nH assuming the other 0.2nH or something will be contributed by the ground vias.
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #38 on: March 15, 2016, 02:39:30 am »
Now kill the "bat"  ;)

You bet, there should be a silver bullet for it
 :)
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #39 on: March 15, 2016, 02:45:17 am »
Thank you so much for the time and effect that went into this. I can't wait for part 3. Very keen to get the scope working as it should.

Was that your software to process waveform data files and display FFT ? I did not try a offline FFT after the mod. May be someone in this thread could post Before and After pictures of an offline FFT.
 

Offline hayatepilot

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #40 on: March 15, 2016, 02:53:13 am »
Great Project!  :-+
But sad, that someone on a forum has to do the job of RIGOL...   :-BROKE
 

Offline AlessandroAU

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #41 on: March 15, 2016, 03:28:48 am »
Thank you so much for the time and effect that went into this. I can't wait for part 3. Very keen to get the scope working as it should.

Was that your software to process waveform data files and display FFT ? I did not try a offline FFT after the mod. May be someone in this thread could post Before and After pictures of an offline FFT.

Hi bud,

I think there are 2 or 3 different projects to download the scope memory and do an FFT, one of them was mine . You can find it by looking through my post history. You need the labview RTE (it's free) to run my exe so it's a bit 'bloated' but that's the price for quick development in labview.

I am very interested in this project because cleaning up the mess that occurs in the FFT with the stock pll is a goal of mine. I would be very interested in seeing the improvements you've made to that effect.

When you release the rest of the documentation and when I get around to doing the mods on my 1054z I will definitely post a comparison FFT with the full 24mpoints. 
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #42 on: March 15, 2016, 03:31:37 am »
Skip the analysis and just post pictures of the fix so people can improve their equipment right away!
This is easy - just bookmark this thread and come back in a month or so and go straight to the last part.

EDIT: the fix part of it ends in Part 4, the rest is going to be exploratory information about the scope capabilities and some reverse engineering of the front end, which a curious reader may find useful.
« Last Edit: March 15, 2016, 03:36:55 am by Bud »
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #43 on: March 15, 2016, 03:45:06 am »
@AlessandroAU

Ok so i start thinking that a higher PFD solution with an external PIC could make sense for offline FFT to get to the best of its capability...

@ All:
So you guys see, if you did not read the complete document with analysis, you would not get what we may be talking about in this thread, example being this post.
 

Offline nanofrog

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #44 on: March 15, 2016, 04:41:09 am »
So you guys see, if you did not read the complete document with analysis, you would not get what we may be talking about in this thread, example being this post.
Nice work Bud, and patiently awaiting for more.  :-+

BTW, I particularly like those high-end inductors you installed in the VCO section.  >:D  :-DD Amazing at how simple a solution can be if you know what you're doing.  ;)
 

Offline ElectricGuy

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #45 on: March 15, 2016, 05:39:15 am »
Part 2. The PLL

Please use the attached PDFs. I had to split to two files because of attachment size restrictions. I may convert to HTML for online read when have time.

I mean.... Man, what a great job you did here! Thank you!  :-+ :-+ :-+
Thank you!
Regards
ElectricGuy
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #46 on: March 15, 2016, 05:57:37 am »
Caused me only a 3 hr sleep this morning...
 ::)
 

Offline ElectricGuy

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #47 on: March 15, 2016, 06:38:27 am »
Caused me only a 3 hr sleep this morning...
 ::)

You should not loose time slepping!!! That's what Yagol Yngineers did!!!!

Do not sleep again, and release Part3  :popcorn:

Just Kidding, and thank you for not sleeping and present us with this great work.....
Thank you!
Regards
ElectricGuy
 

Offline moffy

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #48 on: March 15, 2016, 11:09:26 am »
Fantastic work! Also I envy your test setup, 2 spectrum analysers, wow. Can't stand the suspense though, those bat wings look awfully like low level amplitude modulation of the carrier/clock.
 

Online tautech

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #49 on: March 15, 2016, 11:22:42 am »
Bud with MarkL's assistance bought the poorly implemented Yaigol PLL clock to our attention nearly 18 months ago (for those that were taking notice), there is much about it in the previously linked thread and since then has documented the ordeal in this thread for the benefit of all.  :clap:

That he has taken so long to present his findings in detail is confusing to me and I wait with great interest for any gems not yet revealed.  :-BROKE

Carry on Bud, the floor is yours.  :popcorn:

BTW you could probably get the 2 pdfs in one post by posting one and then the other by way of a "Modify".
Not sure, but it'd be worth a try rather than have to download the 1.5 mb which will a PITA for some.
Avid Rabid Hobbyist
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #50 on: March 15, 2016, 11:52:03 am »
BTW you could probably get the 2 pdfs in one post by posting one and then the other by way of a "Modify".

Sorry I am not sure I understand.
 

Online tautech

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #51 on: March 15, 2016, 12:03:38 pm »
BTW you could probably get the 2 pdfs in one post by posting one and then the other by way of a "Modify".

Sorry I am not sure I understand.
Sorry Bud if I wasn't clear, I meant having both the text and pictorial content of both pdf's in the body of reply #2  as well as being able to download it.
You'd probably have to compress all the pics to stay within forum limits but that wouldn't matter if the full size ones were available in the pdf's for download.

If you want, I'll try and then you can copy/paste into reply #2 after which I'd delete any unnecessary post/s.
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Offline Alex Eisenhut

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #52 on: March 15, 2016, 02:38:51 pm »
Does anyone else think there should be a decoupling cap close to the power pin of the oscillator? Looks to me like there's a LC filter and a ferrite on the input of the regulator, as well as the usual big/small cap combo, but nothing on the load side. I see a little guy floating up there but not right next to the IC.
Unless the cap is on the bottom side, there seems to be vias for that there.

Granted, the thing is probably not drawing more than 10mA, but wouldn't it be best to knock out high frequency energy on the load side, rather than only on the input side of the regulator?

It might change nothing at all, but for a 1 cent part, I thought it was SOP to sprinkle power decoupling caps liberally. I mean you can always depopulate it after some empirical tweaking, no?
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #53 on: March 15, 2016, 04:25:06 pm »
I meant having both the text and pictorial content of both pdf's in the body of reply #2  as well as being able to download it.

But you cant just post pictures in the body of a reply, you have to host them elsewhere and point picture URLs to them from your reply, haven't you?

Quote
If you want, I'll try and then you can copy/paste into reply #2 after which I'd delete any unnecessary post/s.

Sure that would be ideal, as I am not sure when I can get to creating and formatting in-reply copy of it. I can provide a MS Word source file if that helps.
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #54 on: March 15, 2016, 04:32:27 pm »
Does anyone else think there should be a decoupling cap close to the power pin of the oscillator?

I tried one, it did not make a difference. The proper fix is in Part 3 which I just posted.

Quote
Granted, the thing is probably not drawing more than 10mA

Overall current through the LDO is 38mA, that includes the oscillator and the PLL.
« Last Edit: March 15, 2016, 04:35:16 pm by Bud »
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #55 on: March 15, 2016, 04:39:33 pm »
I just found my old notes which says the home made inductors for the PLL should use 9mm long #30 wire (not 7mm as in the article). It also says I measured one made from 10mm length with the VNA and it had 3.25nH inductance at 1GHz. Seems I then reduced the length to 9mm to drop inductance a little.
 

Offline ve7xen

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #56 on: March 15, 2016, 04:40:10 pm »
I meant having both the text and pictorial content of both pdf's in the body of reply #2  as well as being able to download it.

But you cant just post pictures in the body of a reply, you have to host them elsewhere and point picture URLs to them from your reply, haven't you?

You can attach the pictures to the post, then click 'preview' to get the URL of the attached image (this might actually appear before you click 'preview' when you're uploading attachments), then use the `[img]` tag to post them inline. A bit of a pain, but possible.

Great work in this thread!!
73 de VE7XEN
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #57 on: March 15, 2016, 04:43:04 pm »
Oh men, too much work attaching pictures...
 

Online tautech

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #58 on: March 15, 2016, 05:52:58 pm »
Bud with MarkL's assistance bought the poorly implemented Yaigol PLL clock to our attention nearly 18 months ago (for those that were taking notice), there is much about it in the previously linked thread and since then has documented the ordeal in this thread for the benefit of all.  :clap:

That he has taken so long to present his findings in detail is confusing to me and I wait with great interest for any gems not yet revealed.  :-BROKE

Carry on Bud, the floor is yours.  :popcorn:

BTW you could probably get the 2 pdfs in one post by posting one and then the other by way of a "Modify".
Not sure, but it'd be worth a try rather than have to download the 1.5 mb which will a PITA for some.

Quote
The PLL power supply in DS2072A was oscillating.

 :wtf:
 :palm:
Unbelievable

What else is there?  :-BROKE
Avid Rabid Hobbyist
 

Offline Emi

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #59 on: March 15, 2016, 09:03:46 pm »
Mmm...quite shocking this last issue!
if all psu in there "ocillate"  and the "always on"  1khz sig gen too ( why not let it switchable with a pushbutton ? ) it will be a big trouble  :'(
this boy ,and his infinite harmonics, is very close to ch inputs !
what about pwm bcklight then?  |O
Bud, save us...
« Last Edit: March 15, 2016, 09:10:21 pm by Emi »
 

Offline senso

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #60 on: March 15, 2016, 09:35:26 pm »
Very interesting read.
Good job.
 :-+
 

Offline German_EE

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #61 on: March 15, 2016, 09:36:43 pm »
Threads like this are why I find EEVBlog so valuable, there is some damn fine RF detective work going on here.
Should you find yourself in a chronically leaking boat, energy devoted to changing vessels is likely to be more productive than energy devoted to patching leaks.

Warren Buffett
 

Online nctnico

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #62 on: March 16, 2016, 12:48:47 am »
Does anyone else think there should be a decoupling cap close to the power pin of the oscillator?
I tried one, it did not make a difference. The proper fix is in Part 3 which I just posted.
Using a tantalum is one option, the other is to put a small resistor (I always use 0.47 Ohm) in series with a 10uf MLCC capacitor to stabilise an LM1117 (or equivalent) LDO.
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

Online wraper

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #63 on: March 16, 2016, 12:55:52 am »
Does anyone else think there should be a decoupling cap close to the power pin of the oscillator?
I tried one, it did not make a difference. The proper fix is in Part 3 which I just posted.
Using a tantalum is one option, the other is to put a small resistor (I always use 0.47 Ohm) in series with a 10uf MLCC capacitor to stabilise an LM1117 (or equivalent) LDO.
Third option is to replace the LDO with MLCC tolerant type.
http://www.diodes.com/_files/datasheets/ZLDO1117.pdf
 

Offline Monkeh

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #64 on: March 16, 2016, 01:34:13 am »
I haven't opened my DS1054Z, but it's easily confirmed from the teardown photos that the exact same LDO configuration is present and oscillating like a cheap motel bed.
 

Offline madires

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #65 on: March 16, 2016, 02:01:55 am »
Thanks for the thorough investigation!  :-+ It's sad that they have made such stupid mistakes by not reading datasheets. At least we can fix the issues.
 

Offline bitseeker

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #66 on: March 16, 2016, 02:08:56 am »
Bud,

Thanks again for all the work you've put into this. I also like your brand adjustment photo editing. Nice touch!
EEVblog is the place to be for TEA.
 

Offline CaptCrash

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #67 on: March 16, 2016, 02:23:22 am »
Thanks for presenting this, I really enjoyed your image manipulation.  Well done.
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #68 on: March 16, 2016, 02:49:39 am »
Quote
Using a tantalum is one option, the other is to put a small resistor (I always use 0.47 Ohm) in series with a 10uf MLCC capacitor to stabilise an LM1117 (or equivalent) LDO.

Quote
Third option is to replace the LDO with MLCC tolerant type.
Yes can do that too but inserting a resistor is an extra work, may need either cut the pcb track or mount it the capacitor in a tombstone manner. Replacing the LDO is extra work too: Yaigol use 1117 adjustable type of regulator, so there is a voltage setting resistor divider with it. Replacing the regulator will require removing the divider or replacing with a new one depending if your new regulator is of a fixed or adjustable type. In both cases i'd think it is not necessary, just do a simple capacitor swap and you will be fine.
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #69 on: March 16, 2016, 02:53:55 am »
Thanks for presenting this, I really enjoyed your image manipulation.  Well done.

Thank you All for your interest and feedback. Yes wanted to make it a bit funny for easier consumption
 :D
 

Offline Monkeh

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #70 on: March 16, 2016, 02:54:16 am »
Replacing the LDO is extra work too: Yaigol use 1117 adjustable type of regulator, so there is a voltage setting resistor divider with it. Replacing the regulator will require removing the divider or replacing with a new one depending if your new regulator is of a fixed or adjustable type. In both cases i'd think it is not necessary, just do a simple capacitor swap and you will be fine.

The datasheet he linked is for a drop-in replacement for a 1117. Also, pin 1 (ADJ/GND) is clearly firmly connected to ground in both DS1000Z and DS2000 scopes (it's a fixed 3.3V reg).
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #71 on: March 16, 2016, 03:04:21 am »
Ah yes, sorry, i confused it with some other circuit
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #72 on: March 16, 2016, 03:33:00 am »
After i posted Part 3 i found my old notes saying i actually measured the Yaigol capacitor with the VNA and it had 6 mOhm of ESR in its dip. A very far cry from the LDO specified limit of 33 mOhm.
 

Offline bitseeker

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #73 on: March 16, 2016, 03:56:21 am »
Just finished reading Part 3. So, is it fair to say that making the corrections in Part 2 brings a 2000 scope's PLL into a similar condition as the firmware-fixed 1000Z and will lock? In other words, will both models be OK at that point? Then, fixing the LDO oscillation provides additional cleanup applicable to both models, but the values for the 1000Z are TBD.

The final spectrum comparison at the end of Part 3 is awesome.  :-+
EEVblog is the place to be for TEA.
 

Online mimmus78

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #74 on: March 16, 2016, 04:14:06 am »
Thanks buddy ... this post is better than any Netflix series.
 

Online wraper

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #75 on: March 16, 2016, 06:10:06 am »
Yaigol use 1117 adjustable type of regulator, so there is a voltage setting resistor divider with it. Replacing the regulator will require removing the divider or replacing with a new one depending if your new regulator is of a fixed or adjustable type. In both cases i'd think it is not necessary, just do a simple capacitor swap and you will be fine.
Actually not, there is NCP1117 3.3V fixed type on your photo. Even if it was adjustable, no resistor change would be needed as vast majority of LDOs have the same reference voltage.
 

Offline SaabFAN

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #76 on: March 16, 2016, 06:56:13 am »
Well, I guess THAT flushes even the very last moral obstacle against hacking Rigol-Stuff down the toilet.
I certainly don't feel bad about them at all anymore and just added the necessary components to my next Digikey-Order. ^^

Is there a possibility to give the PLL some "proper" values? If I understand it correctly, the Jumpers can be used to disconnect the PLL from the rest of the SPI-Bus.
Should be possible to put a Attiny in there to program the PLL with the right values upon power-up.
Unless the scope is doing some tricky stuff with the PLL under certain operating conditions.

Btw. isn't there a Rigol-Representative here on the Forum? I wonder what he has to say about this apparent aversion to reading the datasheets :)

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #77 on: March 16, 2016, 03:51:40 pm »
Yes it is possible to control the PLL with your own microcontroller. No the scope did not seem to reprogram the PLL during operation, only programmed the registers at power on.
 

Online Mr.B

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #78 on: March 16, 2016, 04:08:36 pm »
Bookmark...
Thank you for going to the trouble of doing all this.
Time is the overseer of all things.
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #79 on: March 16, 2016, 05:55:55 pm »
Thank you and enjoy Part 4.
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #80 on: March 16, 2016, 06:40:21 pm »
And I am tired to tell you what I think about Yaigol. This time I am going to ask you to tell me what
you think about their level of competency and if their Yingineers read Datasheets.
Maybe they've used one of their own DSO's to confirm their PSU designs and the oscillations/ripple is invisible to it?  ;)

For those watching Bud has offered his Yaigol DSO in the Buy/Sell thread:
https://www.eevblog.com/forum/buysellwanted/fs-rigol-ds2072a-oscilloscope-300mhz/

Has it had all the fixes to date Bud?
« Last Edit: March 16, 2016, 06:45:57 pm by tautech »
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Online nctnico

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #81 on: March 16, 2016, 07:20:38 pm »
Thank you and enjoy Part 4.
All LDOs are oscillating?  Yikes!  :palm:
I'm wondering how they missed that during development. The first time I used an LM1117 I spotted it was oscillating pretty quick and that was only one device. Or have the designers put in the right component and got it replaced by something 'compatible' by the procurement department?
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

Offline EV

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #82 on: March 16, 2016, 07:20:57 pm »
Thanks Bud! Great work!
 

Offline kripton2035

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #83 on: March 16, 2016, 07:32:02 pm »
Thank you and enjoy Part 4.
I enjoyed reading part4 as well as all the previous parts
my thoughts : you deserve to sell your scope at a higher price than a new one !

Online Mr.B

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #84 on: March 16, 2016, 07:34:53 pm »
@Bud -
Have you approached Rigol about this?
Pointed them at your thread?

You have done a lot of hard work here and they should be grateful.
Perhaps they will take notice and modify for Rev 2...

I have a 2072...
I don't know whether to make your mods or not... (I have the skills and tools to do direct replacements, no way of getting the inductors tuned correctly though.)
I don't know whether to contact Rigol and make a formal complaint...
Hmm... A bit confused as to what I should do.
Time is the overseer of all things.
 

Online hendorog

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #85 on: March 16, 2016, 07:41:17 pm »
This is really nice work, and interesting. Thanks for taking the time to document it all Bud. However one thing is bothering me.

What effect do these issues have on the actual usage of the scope?

It would be interesting to compare Buds improved scope with an original to see what the differences are in actual use.
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #86 on: March 16, 2016, 07:48:33 pm »
I was wondering about that too. Clearly there's some design errors in the scope, but it would be interesting to see how they affect the actual displayed waveform on screen under various conditions.

I think it would be useful for anyone with an affected scope to know when - or, indeed, if - they are likely to see artefacts that relate to these issues, and what relevant, quantitative improvement they'd see by opening up the scope and applying the fixes.
 

Online Mr.B

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #87 on: March 16, 2016, 07:56:37 pm »
+1

Thats why I am at a loss as to whether to do anything about it...
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Online tggzzz

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #88 on: March 16, 2016, 08:00:32 pm »
In the UK you can return the scope to the supplier under the Consumer Rights Act.

After the first six months the burden is on you to prove that the product was faulty at the time of delivery. In practice, this may require some form of expert report, opinion or evidence of similar problems across the product range. You have six years to take a claim to the small claims court for faulty goods in England, Wales and Northern Ireland and five years in Scotland. This doesn't mean that a product has to last six years - just that you have this length of time in which to make a claim if a retailer refuses to repair or replace a faulty product.

FFI: http://www.which.co.uk/consumer-rights/regulation/consumer-rights-act#link-8
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Offline kripton2035

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #89 on: March 16, 2016, 08:16:11 pm »
Bud lives in canada ...;)

Offline Emi

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #90 on: March 16, 2016, 08:22:12 pm »
Hi..
Bud says  lt1038  is a fixed reg ...
but from ds i assume it's adjustable!
how can he change it on the fly ?
i dont understand this step :-//
« Last Edit: March 16, 2016, 08:25:56 pm by Emi »
 

Online tggzzz

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #91 on: March 16, 2016, 08:23:20 pm »
Bud lives in canada ...;)
Many Rigol purchasers live in the UK.
There are lies, damned lies, statistics - and ADC/DAC specs.
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Online nctnico

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #92 on: March 16, 2016, 08:39:58 pm »
+1
Thats why I am at a loss as to whether to do anything about it...
The oscillation in the LDOs is very likely to swing the power supplies out of spec for the devices they power so if you experience random crashes it is a good idea to apply the LDO fixes.
« Last Edit: March 16, 2016, 08:53:56 pm by nctnico »
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #93 on: March 16, 2016, 08:43:39 pm »
+1

Thats why I am at a loss as to whether to do anything about it...
If you don't the uncertainty will nag you till you die.  ;)

+1
Thats why I am at a loss as to whether to do anything about it...
The oscillation in the LDOs is very likely to swing the power supplies out of spec for the devices they power so if you experience random crashes I is a good idea to apply the LDO fixes.
Exactly
« Last Edit: March 16, 2016, 08:45:15 pm by tautech »
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Online AndyC_772

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #94 on: March 16, 2016, 08:51:50 pm »
I wouldn't personally get my hopes up. A small amount of ripple on a digital supply is unlikely to cause crashes in my experience.

Poor SI on a high speed interface, or buggy code, are far more likely IMHO.

Happy to be proved wrong if someone feels like carrying out a controlled experiment to check.
 

Online nctnico

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #95 on: March 16, 2016, 08:55:55 pm »
I wouldn't personally get my hopes up. A small amount of ripple on a digital supply is unlikely to cause crashes in my experience.
Expect the oscillation to be in the ballpark of 200 to 300mVpp so it is not a small ripple. On a 3.3V supply it is plain to see with an oscilloscope set to 1V/div.
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

Online AndyC_772

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #96 on: March 16, 2016, 09:07:35 pm »
Expect the oscillation to be in the ballpark of 200 to 300mVpp so it is not a small ripple.

I know the theme of the thread is just how tragically incompetent this board's designer clearly was, but seriously...? Even the most inept amateur would spot that amount of ripple, there's no way it wouldn't be noticed.

Again, equally happy to be proved wrong if someone feels like probing an unmodified scope to check. I don't have one.
 

Online tautech

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #97 on: March 16, 2016, 09:22:59 pm »
Even the most inept amateur would spot that amount of ripple, there's no way it wouldn't be noticed.
And release it into production?
Heaven forbid, in days gone by they'd be out the door.
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Offline IanJ

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #98 on: March 16, 2016, 10:50:43 pm »
Hi all,

Rigol in my opinion will know all about this issue as the scope has been around for a good while, well you would have thought so anyways!.
They will have weighed up everything along the way and risk assessed whether they should have done anything about it.

Great work by BUD though, and you never know as a PR push Rigol might adjust the current BOM in production.

For the rest of us, we can enjoy a home fix courtesy of BUD's great instructions. I'll certainly be looking at it.

Ian.
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Online tggzzz

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #99 on: March 16, 2016, 11:02:28 pm »
They will have weighed up everything along the way and risk assessed whether they should have done anything about it.

Probably.

One thing that will get their attention is if their distributors find they are having to sort out complaints and court cases from customers.

IANAL, but given Bud's report, I would expect it would be an easy court case to prosecute in the UK's small claims courts.
There are lies, damned lies, statistics - and ADC/DAC specs.
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Offline Nuno_pt

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #100 on: March 16, 2016, 11:07:22 pm »
The more difficult part will be the two wire ohm alike, for those that don't have an VNA to measure the OHm range at 1GHz.

The rest till now would be pretty strait forward.
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Offline Emi

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #101 on: March 17, 2016, 12:14:16 am »
Right...that coils seems quite tricky to build and put in correctly and are really a critical step. . What's wire exact diameter? 0.25mm ?  And precise orienting?  :o
« Last Edit: March 17, 2016, 12:40:39 am by Emi »
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #102 on: March 17, 2016, 01:32:12 am »
, I would expect it would be an easy court case to prosecute in the UK's small claims courts.

Take it easy guys, it is not worth your time and sweat drugging a spectrum analyser into the courtroom
 ;D
 

Offline c4757p

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #103 on: March 17, 2016, 01:38:44 am »
, I would expect it would be an easy court case to prosecute in the UK's small claims courts.

Take it easy guys, it is not worth your time and sweat drugging a spectrum analyser into the courtroom
 ;D

Yes, please. Everything has design flaws, complaining about them is one thing, but we don't need to make the legal system profit unnecessarily over them ::)
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Offline miguelvp

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #104 on: March 17, 2016, 01:42:09 am »
Not only that, but Rigol only has to show that their equipment meets the specs published.

So far I haven't seen that not being the case, or did I miss something that shows either the DS1000 or the DS2000 not meeting their claimed specs?
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #105 on: March 17, 2016, 01:44:03 am »
#30 converts to 0.254mm, some +/- should be ok, i used two different wire thicknesses from the spools i happened to have. Solder them in rabbit ears fashion ( V- shape) and it should work fine. Again, you could search for and buy two 3nH smt inductors, 0603 size and i recall 0805 can also be fitted, since it is required to solder them at right angle a short extension wire is needed to connect one terminal of the right angled inductor to the second solder pad. The pads on the pcb are too small for a repositionedinductor to be soldered directly to them.
 

Offline exe

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #106 on: March 17, 2016, 01:45:48 am »
Hi Bud,

Nice work! If you still have the scope, could you please post a picture with the "new" noise floor? I'm curious if it is any better.

PS I can't believe how far they got wrong with LDOs and ESR... I suspect there many more surprises inside. But I got it, you've seen enough and now selling the unit.
 

Online wraper

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #107 on: March 17, 2016, 01:47:06 am »
They will have weighed up everything along the way and risk assessed whether they should have done anything about it.

Probably.

One thing that will get their attention is if their distributors find they are having to sort out complaints and court cases from customers.

IANAL, but given Bud's report, I would expect it would be an easy court case to prosecute in the UK's small claims courts.
Prosecute for what? Scopes are working. Good luck to prove that oscillating LDOs makes the scopes being faulty. All you can claim that you are offended by the ripple on power rails  :-DD.
« Last Edit: March 17, 2016, 01:51:13 am by wraper »
 

Offline c4757p

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #108 on: March 17, 2016, 01:58:29 am »
PS I can't believe how far they got wrong with LDOs and ESR... I suspect there many more surprises inside. But I got it, you've seen enough and now selling the unit.

That LDO is one made by many manufacturers, and all are subtly different. I bet they used one in prototyping that was perfectly happy in that circuit, then switched to a different (less expensive?) vendor for production. Could be a decision made by the bean counters, few of whom would realize the potential issue there. It still works, so nobody noticed the problem.
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Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #109 on: March 17, 2016, 01:58:57 am »
@miguelvp

Questioning of claimed specifications was never in my mind. If i happened to buy a 4 cylinder car with only two cylinders working and the car seller speck-d the car fuel consumption and engine performance based on two cylinders, then the specs are technically correct and it does not make sense to claim otherwise even if i went and fixed the other two cylinders.
 

Online tggzzz

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #110 on: March 17, 2016, 02:12:55 am »
Not only that, but Rigol only has to show that their equipment meets the specs published.

Not in the UK. You only have to show the design was defective, and proportionate damages will then be awarded. Of course, what "proportionate" means will vary from owner to owner and court to court.

It is also and entirely separate issue as to whether it is worth an owner going taking any action whatsoever.

I wonder how many people suffered damage from the Pentium FDIV bug? Nonetheless, Intel took prompt and praiseworthy action in that case, and Intel's reputation was enhanced.
There are lies, damned lies, statistics - and ADC/DAC specs.
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Offline miguelvp

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #111 on: March 17, 2016, 02:16:57 am »
PS I can't believe how far they got wrong with LDOs and ESR... I suspect there many more surprises inside. But I got it, you've seen enough and now selling the unit.

That LDO is one made by many manufacturers, and all are subtly different. I bet they used one in prototyping that was perfectly happy in that circuit, then switched to a different (less expensive?) vendor for production. Could be a decision made by the bean counters, few of whom would realize the potential issue there. It still works, so nobody noticed the problem.

That's a common problem, cost reduction gets designs altered in many products and it only requires someone to sign off on it that might not even be the original designer.

Same thing happened to Jeri Ellsworth on her C64 Direct to TV joystick
https://en.wikipedia.org/wiki/C64_Direct-to-TV

Not sure where I've heard it but pretty much she had to fly to China because the devices were not working, just to find out that cost reduction had altered her whole design, so she had to find a way to make it work while it was in production.

She will be the first one to tell you that the resulting device was a POS, but it was produced with low cost in mind, so it ended up to be what it ended up to be.


 

Online tggzzz

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #112 on: March 17, 2016, 02:21:27 am »
, I would expect it would be an easy court case to prosecute in the UK's small claims courts.

Take it easy guys, it is not worth your time and sweat drugging a spectrum analyser into the courtroom
 ;D

Yes, please. Everything has design flaws, complaining about them is one thing, but we don't need to make the legal system profit unnecessarily over them ::)

The legal system wouldn't profit in the UK's small claims court - it is there to get swift cheap justice. No legal representatives are necessary, and plaintifs normally represent themselves. If the defendent wishes to employ lawyers, that is up to them.

It is an excellent mechanism for keeping small claims out of the legal system. Legal costs are not awarded to the loser - which is an excellent incentive against rich defendents trying to intimidate people by spending large amounts of money on lawyers.
There are lies, damned lies, statistics - and ADC/DAC specs.
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Offline c4757p

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #113 on: March 17, 2016, 02:22:44 am »
Minor nitpick, the point is the system doesn't have to be involved in this at all. I don't actually care about the specifics of how your legal system works.
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Online tggzzz

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #114 on: March 17, 2016, 02:28:19 am »
I don't actually care about the specifics of how your legal system works.
In that case why did you make any comments about it in the first place?!
It is also worth avoiding making incorrect comments on subjects you don't know anything about.
There are lies, damned lies, statistics - and ADC/DAC specs.
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Online wraper

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #115 on: March 17, 2016, 02:30:42 am »
Have not checked yet if there is an oscillation, but all 1117s in my non- A DS2072 are not NCP1117 from ON semi but from some different manufacturer which I'm unable to recognize.

« Last Edit: March 17, 2016, 02:32:51 am by wraper »
 

Offline c4757p

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #116 on: March 17, 2016, 02:37:52 am »
I don't actually care about the specifics of how your legal system works.
In that case why did you make any comments about it in the first place?!
It is also worth avoiding making incorrect comments on subjects you don't know anything about.

I made a comment about getting the system involved at all, which has nothing to do with the mechanics about it. The comment about them not needing to make them profit was tongue in cheek anyway, I don't see why it needs to be held to the same standard as if I seriously claimed they would. None of this invalidates my suggestion that we not get them involved at all.

Not making incorrect comments on subjects I don't know anything about is why I didn't explicitly claim they make money on this.

Pays to read completely.
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Online wraper

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #117 on: March 17, 2016, 02:47:05 am »
... And there isn't any LDO oscillation in my scope.
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #118 on: March 17, 2016, 02:50:09 am »
Have not checked yet if there is an oscillation, but all 1117s in my non- A DS2072 are not NCP1117 from ON semi but from some different manufacturer which I'm unable to recognize.

It could be from Taiwan Semi.
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Online wraper

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #119 on: March 17, 2016, 02:54:19 am »
Have not checked yet if there is an oscillation, but all 1117s in my non- A DS2072 are not NCP1117 from ON semi but from some different manufacturer which I'm unable to recognize.

It could be from Taiwan Semi.
I checked those already, marking does not match with the datasheet.
 

Offline marmad

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #120 on: March 17, 2016, 03:04:34 am »
Questioning of claimed specifications was never in my mind. If i happened to buy a 4 cylinder car with only two cylinders working and the car seller speck-d the car fuel consumption and engine performance based on two cylinders, then the specs are technically correct and it does not make sense to claim otherwise even if i went and fixed the other two cylinders.

That seems rather a false equivalency. If you buy a 4 cylinder car, you expect the specs to be based on all 4 cylinders. In what way are you suggesting that Rigol is juking their specs?

I've been using my DS2000 to make money freelancing for 3.5 years without any measurement errors or faults causing me problems  - and with no service issues except for an encoder that died (and was replaced under warranty). While I'm finding your investigation and tweaking of the hardware fascinating, the issues you've discovered - at least in my unit - have had zero effect on my usage of the DSO.
 

Offline Emi

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #121 on: March 17, 2016, 03:08:05 am »
Oppsss ..One more  stupid question, forgive me ...
....
which  esr value is better  in these tantalum caps?
Around 0.5 ohms  or even  higher ( 1  or more ..)

 

Offline uChip

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #122 on: March 17, 2016, 03:12:14 am »
@Bud
Thank you for your excellent efforts.  I recall you criticizing the PLL when the jitter problem was first discovered.  I think your findings prove without a doubt that your criticisms were all correct.  The PLL fail cannot be blamed on building down to a price point. Since you changed only component values, I doubt you impacted manufacturing cost at all in the PLL circuit and by no more than a few pennies overall.  The tantalums are a bit more expensive but I'll bet that with sufficient effort an equivalent cost solution could be had.  There is no excuse for Rigol not to have gotten this right.  I do agree with what folks said about translation from engineering to production.  I've experienced that myself.  It could explain the wrong ESR caps on the LDOs, but not the wrong values on the PLL.

One thing, most of us do not have the SA to confirm our fixes.  We would be doing it blind and taking it on faith that our scope performance was improved.  Replacing caps is relatively easy, but those hand-fabricated inductors are likely beyond me.  It would be of benefit to many, I think, to swap back to chip inductors of the proper value and retest.

@IanJ
Great opportunity for a "repair" video!  I've really enjoyed to ones you've done before.  If you do it there are several places that you could add value.  One, if you have a 1054Z it would be good to perform the fixes and IDing the component locations on that model.  Two, you could use chip inductors instead of hand fabricated.  Three, if you could perform tests that demonstrated performance improvement using more common tools (DMM, another scope, signal reference), that would allow more of us following along at home to verify our results.

@The folks who question the value of the fixes
I agree with the person who said that ripple is not likely to cause crashes.  By its nature digital logic is fairly robust.  It's far more likely that crashes are caused by flawed software.  Besides, the LDOs Bud fixed were for analog circuits.  The impact of those would be things like offsets just as Bud wrote.  Also things like trigger sensitivity and dare I hope that cleaning up the supplies would improve the noise floor.  I would love to see before and after captures of a 10 MHz 2 mV signal.
 


Offline marmad

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #124 on: March 17, 2016, 03:44:51 am »
... And there isn't any LDO oscillation in my scope.

Interesting. Any chance you have an SA and can check the PLL on your non-A DS2000?
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #125 on: March 17, 2016, 03:47:31 am »
Good discussion folks, all opinions are welcome. My motivation was to make circuits work as they should, that is all. But having observed what i observed my equipment shopping list will not have  Yaigol again. Life is too short to have too many unknowns.
 

Online wraper

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #126 on: March 17, 2016, 03:47:58 am »
... And there isn't any LDO oscillation in my scope.

Interesting. Any chance you have an SA and can check the PLL on your non-A DS2000?
No, I don't have a SA, only a desire to have it  :-DD.
 

Online AndyC_772

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #127 on: March 17, 2016, 03:57:25 am »
Good discussion folks, all opinions are welcome. My motivation was to make circuits work as they should, that is all. But having observed what i observed my equipment shopping list will not have  Yaigol again. Life is too short to have too many unknowns.

You've done a nice job of design verification; something which I'm sure we'd all hope and expect the original designer would have done.

Now that you've implemented the fixes, are you able to show any before/after screen captures from the scope itself which show the benefit of these changes?
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #128 on: March 17, 2016, 04:09:31 am »
I don't actually care about the specifics of how your legal system works.
In that case why did you make any comments about it in the first place?!
It is also worth avoiding making incorrect comments on subjects you don't know anything about.

I made a comment about getting the system involved at all, which has nothing to do with the mechanics about it. The comment about them not needing to make them profit was tongue in cheek anyway, I don't see why it needs to be held to the same standard as if I seriously claimed they would. None of this invalidates my suggestion that we not get them involved at all.

Not making incorrect comments on subjects I don't know anything about is why I didn't explicitly claim they make money on this.

Pays to read completely.

I did read your post completely; it was very short and contained neither those points nor caveats.

Anyway, at this point it has become extremely boring.
There are lies, damned lies, statistics - and ADC/DAC specs.
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Online tggzzz

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #129 on: March 17, 2016, 04:12:30 am »
Good discussion folks, all opinions are welcome. My motivation was to make circuits work as they should, that is all. But having observed what i observed my equipment shopping list will not have  Yaigol again. Life is too short to have too many unknowns.

That is a sane conclusion with which I thoroughly agree.

Thank you for your illuminating efforts.
There are lies, damned lies, statistics - and ADC/DAC specs.
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Offline IanJ

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #130 on: March 17, 2016, 04:43:15 am »
Three, if you could perform tests that demonstrated performance improvement using more common tools (DMM, another scope, signal reference), that would allow more of us following along at home to verify our results.

Well, it would have to be........I err, umm, don't own a Spectrum Analyzer (real)......but yes, I was thinking about a video. I have a DS2072 (that thinks it's a DS2202).

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Offline marmad

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #131 on: March 17, 2016, 04:46:35 am »
But having observed what i observed my equipment shopping list will not have  Yaigol again. Life is too short to have too many unknowns.

I can completely understand your feeling, Bud - I've experienced the same sensation myself. But I'm curious if this is the first piece of Chinese test equipment you've purchased?

Having owned briefly / tried extensively an Owon, Hantek, and Siglent beforehand, the Rigol DS2000 was the first cheap Chinese DSO that I could even stand to use (at least in 2012) - and I'd just point out that the PLL/LDO problems you've discovered are in the same league as a plethora of other insane hardware/firmware gaffs I've experienced/seen in a wide range of Chinese brands and Chinese equipment.

As much as many of us (including me) complain about mistakes in Chinese T&ME, in essence, that's what we're paying (or literally, not paying) for: electronic design mistakes, spotty manufacturing, and incomplete and buggy firmware.
 

Offline bitseeker

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #132 on: March 17, 2016, 08:38:41 am »
Well, it would have to be........I err, umm, don't own a Spectrum Analyzer (real)......but yes, I was thinking about a video. I have a DS2072 (that thinks it's a DS2202).

+1 on the video, Ian. Although the FFT in the scope isn't a (real) SA, might it be good enough? The original noise spectrum and the final clean peak are quite apparent.
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Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #133 on: March 17, 2016, 06:10:22 pm »
The internal scope FFT is poor in the first place, I think I did not notice any improvement, its noise is dominated by the 8-bit ADC limits. What should certainly improve is the external FFT for which you capture a long waveform file and load into external software capable of processing the waveform format.
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #134 on: March 17, 2016, 06:13:46 pm »
Part 7 is now posted, and thermal radiometric files supplied in Part 8.

I am going to take a break as I need to work on other things and writing this article has stolen enough of my sleep time. I may return to Part 5 and 6 later.
« Last Edit: March 17, 2016, 06:16:20 pm by Bud »
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #135 on: March 17, 2016, 06:48:34 pm »
Oh men, too much work attaching pictures...
Nice job on the Pt. 7 post, see you can do it.  :-+
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Offline Emi

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #136 on: March 17, 2016, 06:56:07 pm »
ah ah bud...this time i discovered this tweak just before you  ;)     the first mod i've done is a little heatsink on the adc... damn hot ! i could'nt put my finger on without burning first!  :'(
now its warm yes , but will not hurt anymore....
Next step, a silent fan !
« Last Edit: March 17, 2016, 07:47:14 pm by Emi »
 

Offline Dave Atom

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #137 on: March 17, 2016, 07:00:41 pm »
Good discussion folks, all opinions are welcome. My motivation was to make circuits work as they should, that is all. But having observed what i observed my equipment shopping list will not have  Yaigol again. Life is too short to have too many unknowns.

Sorry for what may be a silly question, but I think either I am reading things wrong, or I am just suffering from information overload :

Should I, or should I not, invest in a DS1054Z as my first digital scope ?

I appreciate there are issues, with everything from design, build, hardware, & software, but are they game changers in so much that as a complete novice with little hope (currently) of modifying the scope, should I steer clear of the device ?

(I have noticed the mains lead hasn't been flagged as faulty :] )
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Online tggzzz

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #138 on: March 17, 2016, 07:15:34 pm »
Should I, or should I not, invest in a DS1054Z as my first digital scope ?

Yes, repeat no. It is the best device (given some purposes/constraints), repeat there are much more appropriate devices (given other purposes/constraints). You'll never notice the failures, repeat the failures make it useless.

All those statements are correct. Beware those whose statements fall into either camp; you will find both types here.

And I hope you can guess the next thing you should do if you want more specific advice. But please don't do it in this thread - start a new thread!
There are lies, damned lies, statistics - and ADC/DAC specs.
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Offline nidlaX

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #139 on: March 17, 2016, 08:05:57 pm »
Very interesting! Another thank you to Bud for conducting this thorough investigation and providing such detailed documentation and instructions. I cannot help but think how much this information would be worth from a product development standpoint (clearly too much for Yaigol to invest in?). I don't own a DS2000 series scope, but I think the information still benefits me as a DS1054z owner (not to mention the entertainment value! :-DD).

Based on the followups from other owners, it seems like part of the issue is yet again attributable to poor quality control? Willy-nilly use of "equivalent" components without checking design compatibility...  :palm: Looks like someone is staking out the Shenzhen market for daily specials again.
 

Offline SaabFAN

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #140 on: March 18, 2016, 05:12:56 am »
@Dave Atom:
I wouldn't say that the DS1054Z is a bad scope. It just has its flaws that are expected from a company that had to cut corners on everything to get the price down to have even the slightest chance of getting into the market.
So far I haven't run into any serious issues with my scope and really like the 24MegPoint memory, which seems to be one of the things the Rigols really shine at: Every Rigol-Scope comes with tons of memory compared to other brands - even Tektronix and Keysight don't offer that amount of memory in their devices.

What I absolutely don't like is the fact that the Firmware behaves inconsistently. Sometimes I get immediate responses when turning the offset-knob, at other times (same settings btw.) the scope seems to be bogged down by some random stuff and it takes a while for the changes to appear on screen. Also the FFT, as seen in a video by Dave, is horrible.

But it bugs me that I have a potentially horrible looking ADC-Clock in my scope, as well as what appear to be Schroedingers LDO (It could be oscillating, or not... I have to look at it to know)^^
So my Advice: If you can live with the quirks of the Rigols, get one. If not, get an equally expensive Tektronix TDS-Scope on ebay and a healthy supply of electrolytic capacitors :)

Btw. I suspect Siglent, Owon and the other chinese brands to have similar problems. Can somebody check their devices?^^

Has anyone checked the DSA815 for any problems similar to the Rigol-Scopes?
« Last Edit: March 18, 2016, 05:16:03 am by SaabFAN »
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #141 on: March 18, 2016, 05:31:46 am »
Oh men, too much work attaching pictures...
Nice job on the Pt. 7 post, see you can do it.  :-+

Thanks for the tip, tautech, it was a bit messy at first but worked in the end.  :-+
 

Online nctnico

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #142 on: March 18, 2016, 06:45:05 am »
Oh men, too much work attaching pictures...
Nice job on the Pt. 7 post, see you can do it.  :-+
Thanks for the tip, tautech, it was a bit messy at first but worked in the end.  :-+
Regarding the temperature: It is better to measure using sensors with the case closed so every device has it's 'designed' airflow. Even a little bit of airflow makes a huge difference so it is hard to compare measurements with an open case versus a closed case + airflow.
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

Offline Howardlong

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #143 on: March 18, 2016, 06:49:10 am »

Sorry for what may be a silly question, but I think either I am reading things wrong, or I am just suffering from information overload :

Should I, or should I not, invest in a DS1054Z as my first digital scope ?


This thread probably is not the best one for a prospective $400 scope purchaser to read. While it's not without its features, it took quite some time for the infamous jitter bug to become the stuff of folklore despite many thousands of users.

There is still no other scope out there at this price point with the same specs or real practical use. If $400 is your price point, it's end of story.

 

Online wraper

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #144 on: March 18, 2016, 06:57:46 am »
There is still no other scope out there at this price point with the same specs or real practical use. If $400 is your price point, it's end of story.
There are and with better specs, GDS-1000B series GWinstek. The only advantage of 1000Z is ability to unlock.
 

Offline Howardlong

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #145 on: March 18, 2016, 07:04:08 am »
There is still no other scope out there at this price point with the same specs or real practical use. If $400 is your price point, it's end of story.
There are and with better specs, GDS-1000B series GWinstek. The only advantage of 1000Z is ability to unlock.

I'd like to see a 1:1 to back that up in terms of specs and practical use.
 

Offline Alex Eisenhut

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #146 on: March 18, 2016, 11:33:40 am »
Super awesome. Is it worth it to create a Digikey BOM or outright sell a kit with all parts required for a fix?
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #147 on: March 18, 2016, 01:31:19 pm »
Hi..
Bud says  lt1038  is a fixed reg ...
but from ds i assume it's adjustable!
how can he change it on the fly ?
i dont understand this step :-//

Sorry my bad, this is what happens when you write in the middle of the night and after 9 months...

I replaced with LT3080, an adjustable regulator with only one set resistor. So I removed one resistor and replaced the other - see the datasheet for the set resistor formula.
http://cds.linear.com/docs/en/datasheet/3080fc.pdf
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #148 on: March 18, 2016, 02:34:36 pm »
Some additional supporting artefacts for the project articles:

Just for fun I attached demodulated audio for the DS2072A PLL before and after the fix. The bad PLL had FM modulation that could be demodulated into audible range. I did it with my HP 8594E spectrum analyzer that had that capability. In the Before mp3 file nasty modulation is present, this is how your unfixed PLL would sound if you tune to it at 1GHz with a FM receiver. In the After mp3 file there is no modulation, only background noise which I artificially made louder because the audio was too quiet.

A zip archive with a video of the 6.3V shared power supply rail oscillating. Had to zip it because could not attach a video file.

A high res (well sort of) version of the landscape photo of the board from Part 4 with the oscillating regulators locations marked.

 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #149 on: March 18, 2016, 02:42:28 pm »
ah ah bud...this time i discovered this tweak just before you  ;)     the first mod i've done is a little heatsink on the adc... damn hot ! i could'nt put my finger on without burning first!  :'(
now its warm yes , but will not hurt anymore....
Next step, a silent fan !

Interesting, Emi. I mounted mine with the fins in vertical orientation. I believe I used Digikey p/n 294-1150-ND

 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #150 on: March 18, 2016, 03:08:41 pm »
Now that you've implemented the fixes, are you able to show any before/after screen captures from the scope itself which show the benefit of these changes?

I did not make before screen captures. The original goal was to fix the dysfunctional PLL and then it dragged into fixing its power regulator and then the other regulators. All that time the scope was face down on the bench and all I could only reach was the power button. Second - which some of people still do not seem to understand - this was about bad design practices per se and not about chasing improvements. Some people are OK to live in a house with the roof flapping in the breeze as long as the roof is not leaking. I would go and fix the roof. Third, if someone wants to do a compare he will have to design proper test cases first. One cant estimate improvements by just looking at the screen noise trace, all he will see will be noise generated in LMH6518 voltage control amplifier in the scope analog front-end which is so high that it even masks 8-bit ADC noise. And by the way, don't waste your time trying to measure the noise trace by enabling measurements/statistics - I found readings will depend on the position of the trace on the screen, which is another stupid "feature".


 
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #151 on: March 18, 2016, 05:10:10 pm »
Oh men, too much work attaching pictures...
Nice job on the Pt. 7 post, see you can do it.  :-+

Thanks for the tip, tautech, it was a bit messy at first but worked in the end.  :-+
Yep, pic compression is the key to getting lots of content into ones posts, glad you've got that sorted.

That you've got quality pics it the pdf's is great too for those wanting to have a good look.  ;)


Would you consider reworking the previous parts by way of "Modify" and put the pdf content into the body of each post?
Yeah, I know it's a bit of work, but man that'd really top off your great work and this thread.  8)
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Offline pa3bca

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #152 on: March 18, 2016, 08:15:11 pm »
A high res (well sort of) version of the landscape photo of the board from Part 4 with the oscillating regulators locations marked.
Had to look twice, almost missed it  :)

I am definitely going to open my 2072A en probe the PLL with an SA. (The SA is a Rigol 815, so I hope they are not in cahoots with each other...)
 

Offline pa3bca

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #153 on: March 18, 2016, 10:59:53 pm »
Well my January 2014 DS2072A looks not as bad as Bud's specimen.

Also I checked all the regulators and none of them oscillate. (checked with a 1074Z and the SA).
So what gives?  :-// :-//

The PLL however is not totally clean (not as it should be). But my measuring method is rather unprofessional as can be seen in the photo (I wanted a quick and dirty first impression). But I suspect that if I attach a balun to the diff output the spectrum should not get worse?
« Last Edit: March 18, 2016, 11:34:51 pm by pa3bca »
 

Offline exe

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #154 on: March 18, 2016, 11:02:37 pm »
Well my January 2014 DS2072A looks not as bad as Bud's specimen.

Could you please compare your part numbers (of LDO-s) with those on Bud's scope?
 

Offline pa3bca

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #155 on: March 18, 2016, 11:15:03 pm »
#2 on Bud's photo
« Last Edit: March 18, 2016, 11:26:22 pm by pa3bca »
 

Offline Emi

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #156 on: March 19, 2016, 01:46:01 am »
Hi. I'm "dicking" with coil loops  :)
Is this  tool  good enough  for  a  serious Job?
I would obtain the correct 3nH even  with thicker wire. .
http://www.eeweb.com/toolbox/loop-inductance/
Im really unable to handle such microbic #30  :palm:
« Last Edit: March 19, 2016, 01:56:34 am by Emi »
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #157 on: March 19, 2016, 01:40:13 pm »
Thanks folks for testing. Your PLLs are wobbly. Would you guys want to go ahead and make the PLL change and retest ?

How did you check for oscillation? You may need a spectrum analyzer on the rail.

Check the 6.3V rail for oscillation, it was strongest spot in my case, refer to the attached picture with the blue arrow pointing to the test location (rightmost terminal of the LDO)
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #158 on: March 19, 2016, 01:53:57 pm »
Is this  tool  good enough  for  a  serious Job?

I think it is, I tried with #30 thickness that I used, it produced same result.
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #159 on: March 19, 2016, 02:11:03 pm »
Well my January 2014 DS2072A looks not as bad as Bud's specimen.

Also I checked all the regulators and none of them oscillate. (checked with a 1074Z and the SA).
So what gives?  :-// :-//


That gives exactly this:



That Yaigol scope owners are at the mercy of which part suppler Yaigol used for their batch of oscilloscopes, the phase of the moon, or how much the Earth shakes when their neighbor's dog farts. Isn't this is what Quality Control is supposed to take care of.

For the LDO try locating the manufacturers datasheet and see if it spells requirements on output cap ESR. As to the PLL I think I showed sufficient evidence the design is incorrect.

[/quote]
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #160 on: March 19, 2016, 02:26:07 pm »
Would you consider reworking the previous parts by way of "Modify" and put the pdf content into the body of each post?

Will do when get some free time ...
 

Online hendorog

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #161 on: March 19, 2016, 11:55:59 pm »
...Isn't this is what Quality Control is supposed to take care of.

Edit: Sorry I read something into your post that wasn't there - posting too late at night after a drinks is not a good idea.  :-[

No, it is not.

A well known saying in manufacturing used to be 'you can't test in quality'. Meaning depending on QC as the last line of defence will always fail eventually.
The only path to quality is to make it correctly. That is where the failure is, not QC.





« Last Edit: March 20, 2016, 05:29:50 am by hendorog »
 

Online nctnico

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #162 on: March 20, 2016, 12:05:38 am »
I have prepared the oscilloscope MSO2072A again for a measurement.
With the E-field probe, I can see no oscillate. The peaks at 500 kHz are visible along the whole motherboard.
You are measuring the wrong pin! The middle pin/ tab is the output of the 1117 regulators. If they oscillate it is clear to see with a normal probe and usually at a frequency you could hear.
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

Online wraper

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #163 on: March 20, 2016, 01:27:35 am »
Here the middle pin. Does not look like oscillate. Or do I measure wrong?
You have different LDO ICs, the same as in my oscilloscope which don't oscillate either.
 

Online nctnico

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #164 on: March 20, 2016, 05:31:14 am »
I have prepared the oscilloscope MSO2072A again for a measurement.
With the E-field probe, I can see no oscillate. The peaks at 500 kHz are visible along the whole motherboard.
You are measuring the wrong pin! The middle pin/ tab is the output of the 1117 regulators. If they oscillate it is clear to see with a normal probe and usually at a frequency you could hear.
Here the middle pin. Does not look like oscillate. Or do I measure wrong?

This looks clean enough to me! All in all it starts to point towards a certain batch of oscilloscopes which might be affected.
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

Offline Alex Eisenhut

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #165 on: March 20, 2016, 07:42:49 am »
Given the tremendous PCB real estate, Rigol could have saved 5 cents by using a printed inductor instead of a discrete inductor, seems to me. 3nH works out to about a 500 mils +- 50% on realistic stackups.

Am I naive?
 

Offline krivx

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #166 on: March 20, 2016, 09:50:21 am »
Given the tremendous PCB real estate, Rigol could have saved 5 cents by using a printed inductor instead of a discrete inductor, seems to me. 3nH works out to about a 500 mils +- 50% on realistic stackups.

Am I naive?

Possibly a printed inductor was considered to be too "baked in", there isn't much scope to change values later on.
 

Offline Alex Eisenhut

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #167 on: March 20, 2016, 10:29:57 am »
Given the tremendous PCB real estate, Rigol could have saved 5 cents by using a printed inductor instead of a discrete inductor, seems to me. 3nH works out to about a 500 mils +- 50% on realistic stackups.

Am I naive?

Possibly a printed inductor was considered to be too "baked in", there isn't much scope to change values later on.

Understood, but the PLL is not changing like the LDOs can, right? What's the second source for a ADF4360-7?
 

Offline krivx

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #168 on: March 21, 2016, 10:19:40 pm »
Given the tremendous PCB real estate, Rigol could have saved 5 cents by using a printed inductor instead of a discrete inductor, seems to me. 3nH works out to about a 500 mils +- 50% on realistic stackups.

Am I naive?

Possibly a printed inductor was considered to be too "baked in", there isn't much scope to change values later on.

Understood, but the PLL is not changing like the LDOs can, right? What's the second source for a ADF4360-7?

To be honest, I'm not familiar with the part. Do Analog make a range that use the same footprint? Moving to a cheaper or more available part in the same series is my first thought.
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #169 on: March 22, 2016, 06:10:46 pm »
I started populating Part 5, pls go to the first page of the thread to read.
It is again 3am in the morning... oh boy.

EDIT March 24:  Added JFET buffer info.
« Last Edit: March 24, 2016, 03:29:52 pm by Bud »
 

Online tggzzz

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #170 on: March 22, 2016, 08:45:11 pm »
Part 5. Front End performance
This may be kind of stupid, why attenuate and then compensate by amplifying. My guess it is a compromise to have an input stage with wide range of V/Div settings.

I've just emerged from a Tek 465's front end. For comparison that consists of
  • two switchable attenuators (0/20dB, 0/40dB) in series, giving the 1/10/100/1000 steps
  • followed by cascode amplifiers with gain that can be reduced, giving the 1/2/5 steps
The 0dB+0dB+full gain -> 5mV/div, of course.
« Last Edit: March 22, 2016, 08:49:00 pm by tggzzz »
There are lies, damned lies, statistics - and ADC/DAC specs.
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Online nctnico

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #171 on: March 22, 2016, 09:17:57 pm »
So how come the total loss of the two attenuators is 48dB but we measured only 32dB at VGA output? Apparently the VGA compensates for the missing 16dB loss. This may be kind of stupid, why attenuate and then compensate by amplifying. My guess it is a compromise to have an input stage with wide range of V/Div settings.
This is actuallly very common in oscilloscope front-ends. The atttenuator also serves as an overvoltage protection circuit.
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

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Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #173 on: March 29, 2016, 03:01:05 pm »
How did I make these screenshots ?
 ::)

Bandwidth test


Raise/Fall time test




« Last Edit: March 29, 2016, 03:03:02 pm by Bud »
 
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Online hendorog

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #174 on: March 29, 2016, 04:58:06 pm »
How did I make these screenshots ?

Two practical options come to mind:
Mirrored the R in some editing software, or changed the image in the firmware, recalculated the checksum and installed it.

The 2nd way is cooler, so I hope thats what you did :)

3rd option is mounting the installed filesystem, find the image and change it. That would get bonus points as I think no-one else has done that before...
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #175 on: March 29, 2016, 05:07:23 pm »
Sorry I meant how did I manage to measure a 800MHz signal and get such good rise time on a 70/300MHz scope.
(the screenshots have some clues   :P )
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #176 on: March 29, 2016, 05:23:48 pm »
Doh - you even put red ellipses there.

I'm going back on holiday...
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #177 on: March 29, 2016, 05:32:47 pm »
So did ya hack the VGA into 900MHz mode?

Perhaps by resetting it after the scope had already started so it went into full bandwidth mode?
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #178 on: March 29, 2016, 06:08:20 pm »
You're f***ing with our heads Bud, please put us out of our misery.  :-//
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Offline T3sl4co1l

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #179 on: March 29, 2016, 07:26:54 pm »
I'm going to say direct injection into ADC input.

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Offline krivx

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #180 on: March 29, 2016, 07:58:51 pm »
I'm going to say direct injection into ADC input.

Tim

This seems likely, should it be surprising that the firmware will happily go along with this and give measurements well outside the specs? I'm not sure what the best method for handling this would be. 
 

Offline exe

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #181 on: March 29, 2016, 08:29:48 pm »
This seems likely, should it be surprising that the firmware will happily go along with this and give measurements well outside the specs? I'm not sure what the best method for handling this would be.

I would leave it as is because I don't see clear benefits in "sanity check" in this case because that would decrease "hackability". This also complicates the code, needless to say firmwares are not perfect, more complications potentially would make it less stable/feature rich.

Anyway, I think most measurements functions work with curves, not with measurement points. Performing sanity checks on this is just to tricky and quite pointless, imho.
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #182 on: March 29, 2016, 08:37:32 pm »
Sooo..... who's going to be the first to offer a drive-in-drive-out scope update service for this baby?
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #183 on: March 29, 2016, 08:40:17 pm »
Sooo..... who's going to be the first to offer a drive-in-drive-out scope update service for this baby?
The parts won't cost much, but the labour........
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Online tggzzz

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #184 on: March 29, 2016, 08:42:20 pm »
This seems likely, should it be surprising that the firmware will happily go along with this and give measurements well outside the specs? I'm not sure what the best method for handling this would be.

I would leave it as is because I don't see clear benefits in "sanity check" in this case because that would decrease "hackability".

Please explain the causal connection - if there is one.

Quote
This also complicates the code, needless to say firmwares are not perfect, more complications potentially would make it less stable/feature rich.

I can make it infinitely "feature rich", provided it isn't required that the features actually work.

Quote
Anyway, I think most measurements functions work with curves, not with measurement points.

I really don't understand what you are trying to say. A digitising scope can only measure points. Waveforms are only curves, until you are dealing at the level of individual photons and electrons and quantum, physics.

Quote
Performing sanity checks on this is just to tricky and quite pointless, imho.

If the manufacturers carelessly get that wrong, what else have they carelessly got wrong?

Old saying: "Fool me once, shame on you. Fool me twice, shame on me".
There are lies, damned lies, statistics - and ADC/DAC specs.
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Offline exe

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #185 on: March 29, 2016, 08:56:27 pm »
I really don't understand what you are trying to say. A digitising scope can only measure points. Waveforms are only curves, until you are dealing at the level of individual photons and electrons and quantum, physics.

You move cursors on a waveform, not between points. Analytic functions (or whatever they called) work on waveforms. Why should they care how and what waveform was acquired? In some cases it can be an indication that something is wrong or outside the speck. But this is not a proper self-test for this.

If the manufacturers carelessly get that wrong, what else have they carelessly got wrong?

Why do you think this is wrong? Sorry, I feel like you just falling into "this is wrong and everyone who does not share my point of view is incompetent" without any reasoning.
 

Online tggzzz

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #186 on: March 29, 2016, 09:26:53 pm »
I really don't understand what you are trying to say. A digitising scope can only measure points. Waveforms are only curves, until you are dealing at the level of individual photons and electrons and quantum, physics.
You move cursors on a waveform, not between points. Analytic functions (or whatever they called) work on waveforms. Why should they care how and what waveform was acquired? In some cases it can be an indication that something is wrong or outside the speck. But this is not a proper self-test for this.

Ah. You mean functions that work on continuous curve inferred by interpolating between the sampled points. So that is going to depend on the interpolation chosen, the circumstances undet which the interpolation is and isn't valid, and on whether the implementation is correct.

Is there a hint there?

Quote
If the manufacturers carelessly get that wrong, what else have they carelessly got wrong?
Why do you think this is wrong? Sorry, I feel like you just falling into "this is wrong and everyone who does not share my point of view is incompetent" without any reasoning.

Please don't snip the relevant bits in order to (try to) make a point. You wrote "Performing sanity checks on this is just to tricky and quite pointless".

If an instrument doesn't pass a sanity check, should you continue to put faith in the instrument?

Old saying: "Fool me once, shame on you. Fool me twice, shame on me".
There are lies, damned lies, statistics - and ADC/DAC specs.
Glider pilot's aphorism: "there is no substitute for span". Retort: "There is a substitute: skill+imagination. But you can buy span".
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Online AndyC_772

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #187 on: March 29, 2016, 09:31:42 pm »
Sorry I meant how did I manage to measure a 800MHz signal and get such good rise time on a 70/300MHz scope.
(the screenshots have some clues   :P )

Display mode in the top screen is X-Y. You're feeding in an external, slower time base on the X channel.
 

Offline exe

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #188 on: March 29, 2016, 09:50:22 pm »
Okay, I think I was too strong on statements. I don't say "no check is ever needed". I say four things 1) I don't trust rigol implementing them 2) shouldn't be part of analytical functions. 3) may affect hackability 4) sanity check is very limited when analyzing unknown waveform. And here is why I think so.

1)
analytical functions != Input validation is a different thing. Checking the input range or "space between points" is fine. But...

2)
If it is too strict on checking inputs this may greatly harm hackability. How so? Imagine you removed restriction on bandwidth. But the scope "doesn't know" about this. So it can indicate a failure in this case. Or if I "overclock" it it may refuse work faster because "it checks the specs".

3)
It happened to me I'm a software developer, so I know a little bit about software. I didn't get your point about features, but I repeat my statement: more code -- more hassle to maintain it. If I knew they have good software specialists I would welcome more checks. But since it's rigol I have a fear that they don't have expertise. They can easily degrade scope performance when adding more validation. And it's not uncommon to see "software gone mad".

4) I think best check is the analysis of a signal with a known waveform. I'm not sure it is possible to catch most failures just by analyzing user input.
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #189 on: March 29, 2016, 10:29:41 pm »
@AndyC:
This is the Cursor menu, X-Y is relative to the display of cursors, not the acquisition mode.
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #190 on: March 29, 2016, 10:46:32 pm »
Bandwidth means -3dB at max frequency. Let's suppose your input signal amplitude is 5V, you have here 4mV, so an attenuation of more than -61dB, so clearly outside bandwidth. The sampling rate being 2Gs/s, you're still in the Nyquist ratio of 2 samples/period, so the digitalized signal is still valid.
 

Online tggzzz

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #191 on: March 29, 2016, 11:40:48 pm »
How did I make these screenshots ?

Is there any way that you can force the scope to show just the ADC samples, without interpolation / reconstruction / post-capture filtering?

For the rise/falltime, which points are being measured? What happens when the front-end is overloaded? Is it simply measuring noise and finding a signal?
There are lies, damned lies, statistics - and ADC/DAC specs.
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Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #192 on: March 30, 2016, 01:16:31 am »
Thanks guys for participating in the discussion. I will answer in the evening when get home, i do not like typing on my mobile. For now just can say there was no fiddling with the clock frequency, these are actual shots of high frequency and low rise/fall time signals. And still there is a common clue in both screenshots that seems has not been spotted yet.  :)
 

Offline exe

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #193 on: March 30, 2016, 01:28:14 am »
And still there is a common clue in both screenshots that seems has not been spotted yet.  :)

My guess is you hacked the input attenuator -- removed/modified low-pass filter.
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #194 on: March 30, 2016, 01:33:32 am »
The sampling rate being 2Gs/s, you're still in the Nyquist ratio of 2 samples/period, so the digitalized signal is still valid.

I agree wit this. Removing interpolation and leaving only datapoints should show something triangle-like. Plus some input hacking imho.
 

Online AndyC_772

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #195 on: March 30, 2016, 01:39:36 am »
@AndyC:
This is the Cursor menu, X-Y is relative to the display of cursors, not the acquisition mode.

Ah, OK, fair enough.

Perhaps it's something to do with the signal level being extremely low (I see measurements of just a few mV... not sure how exactly they're being calculated)...? Very small amplitude means the system isn't limited by slew rate, because the V/sec rate is still within limits even if the input frequency is high.
 

Online tggzzz

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #196 on: March 30, 2016, 03:07:11 am »
The sampling rate being 2Gs/s, you're still in the Nyquist ratio of 2 samples/period, so the digitalized signal is still valid.

I agree wit this. Removing interpolation and leaving only datapoints should show something triangle-like. Plus some input hacking imho.

Why are you choosing that specific reconstruction? Why not  a zero-order hold or, better, just the impulses?
There are lies, damned lies, statistics - and ADC/DAC specs.
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Offline exe

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #197 on: March 30, 2016, 08:41:21 am »
Why are you choosing that specific reconstruction? Why not  a zero-order hold or, better, just the impulses?

I think I meant "just impulses" (=no reconstruction?). I'm no expert in this stuff, it's just a picture that popped into my head -- dots connected with straight lines. May be because I saw this on youtube when the guy chose "no interpolation" on the scope. Probably, it was in "the signal path blog" and with a review of a 100GHz scope.
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #198 on: March 30, 2016, 09:21:48 am »
Thanks guys for participating in the discussion. I will answer in the evening when get home, i do not like typing on my mobile. For now just can say there was no fiddling with the clock frequency, these are actual shots of high frequency and low rise/fall time signals. And still there is a common clue in both screenshots that seems has not been spotted yet.  :)

The first screenshot has the bandwidth limit on - but is still measuring 800MHz...
Both traces look very sharp compared to the equivalent signal on my DS4k - is averaging turned on or is that typical when the scope is stopped?



 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #199 on: March 30, 2016, 01:23:09 pm »
Bandwidth means -3dB at max frequency. Let's suppose your input signal amplitude is 5V, you have here 4mV, so an attenuation of more than -61dB, so clearly outside bandwidth. The sampling rate being 2Gs/s, you're still in the Nyquist ratio of 2 samples/period, so the digitalized signal is still valid.

Nope, the waveform quickly becomes fuzzy after you cross the VGA set bandwidth limit.
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #200 on: March 30, 2016, 02:21:00 pm »
Tim got it right or almost right, and a few other people were close. It could be seen that the mv/Div was set very low, 500uV/ in one shot and 5mV/ in the other, but there was no trace noise in the shots, look how noise-free the waveform is.



In Part 5 I said the variable bandwidth VGA in the front-end is responsible for generating most of the noise in the path. Noise-free waveforms in the screenshots with such small mv/Div could only be obtained if to bypass most of the input stage and inject the signal into the ADC buffer. It was too much problem to get the signal right into the ADC pins, it was easier to do it with the ADC buffer stage as shown in the following picture.



I unsoldered the two SMT resistors (they are two zero Ohm jumpers) located near the VGA and that gave me access to the LMH6552 ADC buffer input. hooked up a RF balun to it to convert differential input into single ended input, with a pigtail microcoax soldered to the other end of the balun.



I could then perform sweeps and do bandwidth measurements of the ADC buffer + ADC, lets take a look again what I posted in Part 5:



We are looking at the blue line which is the ADC buffer + ADC transfer function. In fact it had gain so the chart was normalized to the maximum gain point which occurred at around 300MHz with 5dB gain. Therefore if we consider the leftmost end of the blue line to be 0dB, the -3dB point to the right of it and relative to it would be around 800...850MHz (the blue line). So technically this part of the signal path is capable of 800MHz bandwidth, and that was what you saw in the screenshots with a sinewave and raise time test.

I recall doing a few sweeps and if I remember correctly the scope triggered up to 600MHz. Above that it rolled but I could stop it and see the waveform up to 800MHz (with 2GS/ sample rate, single channel mode). So basically the capability is there but is crippled by the VGA bandwidth limit. Technically the VGA SPI bus could be hacked, commands intercepted and corrected so in Full bandwidth mode it could be set to say 600MHz, so what you get is  a 500MHz scope for almost no extra money. The problem however is with highjacking the VGA SPI bus tracks, doing this would require unsoldering the LMH6518 VGA and perhaps fitting it on a small PCB and retrofit that PCB back to where the VGA was. Too much trouble, though in theory can be done. May be I would have done it, had I not decided by the time I will not keep the scope. Also, I had not thoroughly tested the scope in all modes with this, beside the FFT which still worked correctly. I think the frequency counter became shaky and gave incorrect readings above 450MHz or so. Anyway, this may be an interesting info for a determined person to explore more.

So, [Dave mode] if you liked this info, give it a thumbs up, that always helps [/Dave mode]  :D

« Last Edit: March 30, 2016, 02:29:10 pm by Bud »
 
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Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #201 on: March 30, 2016, 03:48:19 pm »
Actually a quick and dirty method would be to use the above schematic trick with a 1:4 balun and feed its input coax to may be the back panel or to one channel's BNC on the front panel of the scope, The input stage of one channel can be sacrificed for that if there is a desperate need in a higher bandwidth. Scope V/Div settings would not work in this case for that channel and the input must be kept less than 100mV RMS to not overload the ADC buffer.

A variation of it could be reusing the attenuator stage and may be reusing everything else and skipping the VGA. That would give possibility to change V/Div and perhaps vertical position adjustment. Still, V/Div would not be accurate because some of gain adjustment occurs in the VGA via the SPI bus control.   :blah:
 
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Online hendorog

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #202 on: March 30, 2016, 05:08:11 pm »
What do you think would happen if the VGA was able to be reset - i.e. remove power and then restore it.

If I read it correctly its power on state according to the datasheet is Full bandwidth, low gain and no attenuation.
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #203 on: March 30, 2016, 07:52:31 pm »
The problem with bypassing the VGA (and other bandwidth limiting devices) is that you'll get a whole lot of aliasing with any signal which is not a sine wave. In other words: you need filtering in the front end!
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

Offline exe

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #204 on: March 30, 2016, 07:58:47 pm »
So basically the capability is there but is crippled by the VGA bandwidth limit.

That's why I always want source codes at hand :(. It would be just a few lines code changed to "unlock" the performance. It's not just about scopes, in general a lot of hardware is capped by software.

So, [Dave mode] if you liked this info, give it a thumbs up, that always helps [/Dave mode]  :D

Thumbs up! :D
 

Offline T3sl4co1l

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #205 on: March 30, 2016, 10:19:48 pm »
The problem with bypassing the VGA (and other bandwidth limiting devices) is that you'll get a whole lot of aliasing with any signal which is not a sine wave. In other words: you need filtering in the front end!

Aliasing is desirable for an oscilloscope.

With suitable timing, it can be harnessed to obtain equivalent time sampling.  Imagine over 1GHz bandwidth from a $400 scope!

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Offline rch

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #206 on: March 30, 2016, 10:31:52 pm »
The problem with bypassing the VGA (and other bandwidth limiting devices) is that you'll get a whole lot of aliasing with any signal which is not a sine wave. In other words: you need filtering in the front end!

Aliasing is desirable for an oscilloscope.

With suitable timing, it can be harnessed to obtain equivalent time sampling.  Imagine over 1GHz bandwidth from a $400 scope!

Tim


I remember when that was the only way to make a 1GHz 'scope!
 

Offline Alex Eisenhut

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #207 on: March 30, 2016, 10:48:18 pm »
The problem with bypassing the VGA (and other bandwidth limiting devices) is that you'll get a whole lot of aliasing with any signal which is not a sine wave. In other words: you need filtering in the front end!

Aliasing is desirable for an oscilloscope.

With suitable timing, it can be harnessed to obtain equivalent time sampling.  Imagine over 1GHz bandwidth from a $400 scope!

Tim

Tektronix 547 + 1S1 plugin.
 

Offline exe

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #208 on: March 30, 2016, 11:26:35 pm »
Tektronix 547 + 1S1 plugin.

Is there any plugin for storing and navigating waveforms?  ;D
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #209 on: March 31, 2016, 12:40:10 am »
With suitable timing, it can be harnessed to obtain equivalent time sampling.  Imagine over 1GHz bandwidth from a $400 scope!

DS2072a price is $839 or something.
« Last Edit: March 31, 2016, 12:54:24 am by Bud »
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #210 on: March 31, 2016, 12:52:02 am »
What do you think would happen if the VGA was able to be reset - i.e. remove power and then restore it.

If I read it correctly its power on state according to the datasheet is Full bandwidth, low gain and no attenuation.

But cycling the power may also reset the DC offset calibration (im still not sure if some or all of it done by the VGA)

I am now thinking that in fact you only need to highjack the Chip Select line, the Data abd Clock perhaps could be simply paralleled with the scope bus. In which case should be possible to leave the VGA on the board.


 

Offline ghulands

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #211 on: March 31, 2016, 05:53:37 am »
I'm looking to get a DS4024 and was curious if anyone who has one has checked to see if it too has this as well.
 

Offline el_dooderino

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #212 on: March 31, 2016, 06:23:43 am »
Thanks for doing this! Really enlightening. Besides the obvious improvement of the clock spectrum, do you notice a difference on captured waveforms? Perhaps a lower noise floor or less jitter on captured signals?
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #213 on: March 31, 2016, 06:28:16 am »
I'm looking to get a DS4024 and was curious if anyone who has one has checked to see if it too has this as well.

Connor Wolf did a teardown of one here:
 
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Offline ghulands

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #214 on: April 02, 2016, 03:21:31 am »
I'm looking to get a DS4024 and was curious if anyone who has one has checked to see if it too has this as well.

Connor Wolf did a teardown of one here:


Thanks for the link. I couldn't see the PLL circuit in that video, but I think I did find it in another one of his videos

https://youtu.be/MbWz8yB_vTQ?t=701

It's not the sharpest image that i grabbed from the video. But i think this might be it. Can anyone confirm?
 

Offline Fungus

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #215 on: April 02, 2016, 06:21:21 am »
Thanks for doing this! Really enlightening. Besides the obvious improvement of the clock spectrum, do you notice a difference on captured waveforms? Perhaps a lower noise floor or less jitter on captured signals?

This.

Does the 'fix' make the slightest difference to the performance of the 'scope?
 

Offline EEVblog

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #216 on: May 14, 2016, 06:36:22 pm »
Can't believe I haven't seen this thread!
The forum is just too big I guess...
 

Offline krivx

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #217 on: May 14, 2016, 07:15:19 pm »
Can't believe I haven't seen this thread!
The forum is just too big I guess...

It seems like pretty good video material...
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #218 on: May 18, 2016, 03:08:44 am »
Quite some time back, in a different thread, I wrote:

In regards to your hardware issue guess, it well may be the case. I have opened my 2072a to fix the ADC clock problem and what I found beside that problem was bunch of other hardware related problems all over the board, along and across. In one instance reviewing a circuit that occupied 1 square inch of space on the  PCB I counted 10 design errors! Wrong component selection, wrong design, wrong circuit layout. 10 errors per sq inch,

Have you detailed these errors somewhere, and especially the corrections you'd make to fix the errors you found?   If so, where did you write them up?

If not, why not?   Such an analysis could be immensely useful, or at the very least highly instructive.


Boy, did Bud deliver!!   This is awesome stuff.   MAJOR thumbs up!
 

Offline Bud

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #219 on: May 18, 2016, 02:32:53 pm »
Someone posted in a other thread 2000 line is/will be soon discontinued. Good to see that crap go. Until then feel free to spread the word and repost so more people get educated on the meaning of "best bung for the buck".
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #220 on: May 18, 2016, 02:46:43 pm »
Someone posted in a other thread 2000 line is/will be soon discontinued. Good to see that crap go. Until then feel free to spread the word and repost so more people get educated on the meaning of "best bung for the buck".
:scared:
That's not a typo is it?
 :popcorn:
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Offline Circlotron

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #221 on: May 19, 2016, 03:37:05 pm »
"best bung for the buck".
Or more realistically "least worst scope for your money".
I've got one. When I don't know what is happening on the inside, most everything looks good on the outside. That's not to excuse sloppy hardware and firmware for a moment, and I wish they were both perfect, but the way I use my scope 99% of the time there are no obvious shortcomings. Having said that, I'm all for uncovering what ought to be improved.
 

Offline bitseeker

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #222 on: May 19, 2016, 04:06:07 pm »
It's also worthy to note that Rigol did make improvements/corrections to this and other models and devices since their introduction.
EEVblog is the place to be for TEA.
 

Offline kripton2035

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #223 on: May 19, 2016, 04:13:20 pm »
the only solution : win a keysight next year !

Offline bitseeker

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #224 on: May 19, 2016, 04:41:34 pm »
Yes! I shall enter again. Next time for sure. LOL!
EEVblog is the place to be for TEA.
 

Offline kripton2035

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #225 on: May 19, 2016, 07:42:11 pm »
and as you are american, if you win the taxes only of the keysight makes the price of the rigol ... LOL...

Offline bitseeker

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #226 on: May 20, 2016, 03:26:32 am »
Yeah, spend a Rigol, get a Keysight. Sounds like a good deal to me. :-+
EEVblog is the place to be for TEA.
 

Offline Fungus

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« Last Edit: May 23, 2016, 02:31:35 am by Fungus »
 

Online wraper

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #228 on: May 25, 2016, 05:06:04 pm »
Looks like Keysight engineers understand PLL design much better than Rigol engineers!  :popcorn:

https://www.eevblog.com/forum/testgear/agilent-dsox2024-won't-boot/

https://www.eevblog.com/forum/testgear/oh-no!-i'm-never-buying-any-agilent-keysight-equiment-ever-again!/
Of course they do. They detect if there is no PLL lock. Rigol just silently outputs the variable frequency jittery crap into the ADC clock.
 

Online hendorog

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #229 on: May 25, 2016, 05:20:19 pm »
Looks like Keysight engineers understand PLL design much better than Rigol engineers!  :popcorn:

https://www.eevblog.com/forum/testgear/agilent-dsox2024-won't-boot/

https://www.eevblog.com/forum/testgear/oh-no!-i'm-never-buying-any-agilent-keysight-equiment-ever-again!/
Of course they do. They detect if there is no PLL lock. Rigol just silently outputs the variable frequency jittery crap into the ADC clock.

But it seems to still meet its specs? Are you saying it was over-engineered? :popcorn:
 

Online wraper

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #230 on: May 25, 2016, 05:30:41 pm »
Looks like Keysight engineers understand PLL design much better than Rigol engineers!  :popcorn:

https://www.eevblog.com/forum/testgear/agilent-dsox2024-won't-boot/

https://www.eevblog.com/forum/testgear/oh-no!-i'm-never-buying-any-agilent-keysight-equiment-ever-again!/
Of course they do. They detect if there is no PLL lock. Rigol just silently outputs the variable frequency jittery crap into the ADC clock.

But it seems to still meet its specs? Are you saying it was over-engineered? :popcorn:
Who meet the specs, Rigol? Certainly was not the case For DS1054Z because it had apparent effects on the waveform captured. Until they firmware(ish) kinda "almost" fixed non locking PLL, almost because the clock still remained not that clean, and it's not certain if 100% of the scopes became good enough to not have visible issues. This varies from scope to scope and you don't know how bad your particular unit is.
As of Keysight, scope checks and informs you if PLL gone wrong, therefore you know when the scope cannot be trusted.
 

Online hendorog

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #231 on: May 25, 2016, 05:51:31 pm »
Looks like Keysight engineers understand PLL design much better than Rigol engineers!  :popcorn:

https://www.eevblog.com/forum/testgear/agilent-dsox2024-won't-boot/

https://www.eevblog.com/forum/testgear/oh-no!-i'm-never-buying-any-agilent-keysight-equiment-ever-again!/
Of course they do. They detect if there is no PLL lock. Rigol just silently outputs the variable frequency jittery crap into the ADC clock.

But it seems to still meet its specs? Are you saying it was over-engineered? :popcorn:
Who meet the specs, Rigol? Certainly was not the case For DS1054Z because it had apparent effects on the waveform captured. Until they firmware(ish) kinda "almost" fixed non locking PLL, almost because the clock still remained not that clean, and it's not certain if 100% of the scopes became good enough to not have visible issues. This varies from scope to scope and you don't know how bad your particular unit is.
As of Keysight, scope checks and informs you if PLL gone wrong, therefore you know when the scope cannot be trusted.

It was discussed on page 4 of this thread - about DS2k not the earlier issue about DS1k. AFAIK no-one found any problem with the DS2k in operation. Doesn't that deserve some more scrutiny? How come it doesn't matter? Is it being hidden by the poor FFT?

I think the DS1k problem was only visible once the data was extracted from the scope and an FFT run outside the scope? Perhaps that is also the case here.
 

Online wraper

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #232 on: May 25, 2016, 05:59:10 pm »
I think the DS1k problem was only visible once the data was extracted from the scope and an FFT run outside the scope? Perhaps that is also the case here.
No, it was perfectly visible on the scope screen. Dave even made a video about this.
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #233 on: May 25, 2016, 06:07:58 pm »
I think the DS1k problem was only visible once the data was extracted from the scope and an FFT run outside the scope? Perhaps that is also the case here.
No, it was perfectly visible on the scope screen. Dave even made a video about this.


Ah yeah, but that was fixed by a firmware update - I was talking about what was left after the firmware update. I'm trying to find it now...
 

Online tautech

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #234 on: May 25, 2016, 06:08:28 pm »
It was discussed on page 4 of this thread - about DS2k not the earlier issue about DS1k.
You must have missed following this link in the OP:
https://www.eevblog.com/forum/blog/eevblog-683-rigol-ds1000z-ds2000-oscilloscope-jitter-problems/msg552777/#msg552777
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Online hendorog

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #235 on: May 25, 2016, 06:15:17 pm »
It was discussed on page 4 of this thread - about DS2k not the earlier issue about DS1k.
You must have missed following this link in the OP:
https://www.eevblog.com/forum/blog/eevblog-683-rigol-ds1000z-ds2000-oscilloscope-jitter-problems/msg552777/#msg552777

Yep but I believe also prior to the update which resolved it to the point where it behaved normally.

Buds investigation was on what was left behind after the update.
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #236 on: May 25, 2016, 06:26:08 pm »
It was discussed on page 4 of this thread - about DS2k not the earlier issue about DS1k.
You must have missed following this link in the OP:
https://www.eevblog.com/forum/blog/eevblog-683-rigol-ds1000z-ds2000-oscilloscope-jitter-problems/msg552777/#msg552777

Yep but I believe also prior to the update which resolved it to the point where it behaved normally.

Buds investigation was on what was left behind after the update.
I ask you how can a FW update fix a PLL design error, it can't, it only masks the problems it creates.

Buds investigation follows on from what was discovered in the DS1054Z WITH a DS2072A and confirms there's been an error in design, so bad that the PLL manufacturers datasheets layout recommendations appear to have been totally ignored.

Look, all manufactures make mistakes and there's many examples in threads here, this is just another one.
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Online hendorog

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #237 on: May 25, 2016, 06:35:51 pm »
It was discussed on page 4 of this thread - about DS2k not the earlier issue about DS1k.
You must have missed following this link in the OP:
https://www.eevblog.com/forum/blog/eevblog-683-rigol-ds1000z-ds2000-oscilloscope-jitter-problems/msg552777/#msg552777

Yep but I believe also prior to the update which resolved it to the point where it behaved normally.

Buds investigation was on what was left behind after the update.
I ask you how can a FW update fix a PLL design error, it can't, it only masks the problems it creates.

Buds investigation follows on from what was discovered in the DS1054Z WITH a DS2072A and confirms there's been an error in design, so bad that the PLL manufacturers datasheets layout recommendations appear to have been totally ignored.

Look, all manufactures make mistakes and there's many examples in threads here, this is just another one.

Yep a firmware upgrade _can_ resolve a PLL error. I know this because I just built one and the relationship between the physical components and the settings was important enough to make the difference between not locking, locking with massive spurs, and locking with minimal spurs. (that was the best I could do on that board because I ignored the manufacturers advice, new PCB on the way :) )

I completely agree with your second point - they screwed up. But Keysight screwed up too, the only difference was that they detected their screwup and charged $2k to fix it...

But my original point stands -  at least for the DS2k it actually doesn't seem to matter. No-one has yet been able to explain _why_ it doesn't matter.
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #238 on: May 25, 2016, 06:50:29 pm »
It was discussed on page 4 of this thread - about DS2k not the earlier issue about DS1k.
You must have missed following this link in the OP:
https://www.eevblog.com/forum/blog/eevblog-683-rigol-ds1000z-ds2000-oscilloscope-jitter-problems/msg552777/#msg552777

Yep but I believe also prior to the update which resolved it to the point where it behaved normally.

Buds investigation was on what was left behind after the update.
I ask you how can a FW update fix a PLL design error, it can't, it only masks the problems it creates.

Buds investigation follows on from what was discovered in the DS1054Z WITH a DS2072A and confirms there's been an error in design, so bad that the PLL manufacturers datasheets layout recommendations appear to have been totally ignored.

Look, all manufactures make mistakes and there's many examples in threads here, this is just another one.

Yep a firmware upgrade _can_ resolve a PLL error. I know this because I just built one and the relationship between the physical components and the settings was important enough to make the difference between not locking, locking with massive spurs, and locking with minimal spurs. (that was the best I could do on that board because I ignored the manufacturers advice, new PCB on the way :)
Well we learn something every day....thanks.
Do consider sharing your Yaigol design *moment* in another thread, I'm sure we'll all learn from your experience.  ;)

Quote
I completely agree with your second point - they screwed up. But Keysight screwed up too, the only difference was that they detected their screwup and charged $2k to fix it...
But that's not over yet.....once the word get out more and other user/owners that have had to pay for the fix find out....shit anything could happen, court cases, recalls, hey it's all happened to manufacturers before.  :popcorn:

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Online wraper

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #239 on: May 25, 2016, 06:59:13 pm »
But Keysight screwed up too, the only difference was that they detected their screwup and charged $2k to fix it...
There is a big difference between screwed up design and faulty particular unit. Also, don't forget about that it is Brazil, prices will be 2x+ of the US.
Quote
detected their screwup and charged $2k to fix it...
After warranty has already expired.
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #240 on: May 25, 2016, 07:12:19 pm »

I ask you how can a FW update fix a PLL design error, it can't, it only masks the problems it creates.

Buds investigation follows on from what was discovered in the DS1054Z WITH a DS2072A and confirms there's been an error in design, so bad that the PLL manufacturers datasheets layout recommendations appear to have been totally ignored.

Look, all manufactures make mistakes and there's many examples in threads here, this is just another one.

Yep a firmware upgrade _can_ resolve a PLL error. I know this because I just built one and the relationship between the physical components and the settings was important enough to make the difference between not locking, locking with massive spurs, and locking with minimal spurs. (that was the best I could do on that board because I ignored the manufacturers advice, new PCB on the way :)
Well we learn something every day....thanks.
Do consider sharing your Yaigol design *moment* in another thread, I'm sure we'll all learn from your experience.  ;)

Yes I have been thinking about that. I probably will once the new board arrives and I can show some progress.
It was a bit of a journey which started at  'complete disaster' and made it to 'OMG it kinda works' :)

Quote
Quote

I completely agree with your second point - they screwed up. But Keysight screwed up too, the only difference was that they detected their screwup and charged $2k to fix it...
But that's not over yet.....once the word get out more and other user/owners that have had to pay for the fix find out....shit anything could happen, court cases, recalls, hey it's all happened to manufacturers before.  :popcorn:


Agree, that one will be interesting to watch.

 

Online hendorog

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #241 on: May 25, 2016, 07:20:47 pm »
But Keysight screwed up too, the only difference was that they detected their screwup and charged $2k to fix it...
There is a big difference between screwed up design and faulty particular unit.

Yep, but which one is it ??

Quote
detected their screwup and charged $2k to fix it...
After warranty has already expired.
[/quote]

Yes, but that is on a 2.8k scope. Which is not commensurate with an A brand supplier.
If you have to throw away your scope and buy a new one when it breaks then there is no point buying A brand gear.
 

Online wraper

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #242 on: May 25, 2016, 07:39:14 pm »
Yes, but that is on a 2.8k scope. Which is not commensurate with an A brand supplier.
If you have to throw away your scope and buy a new one when it breaks then there is no point buying A brand gear.
Not $2.8k if bought in Brazil. You don't understand how bad it is. Even in EU which is not that bad at all, prices usually are much higher. Though often are comparable for Keysight particularly as for now, after EUR exchange rate started to suck a lot but Keysight pricing in EUR seems not changed much.
Translated from newark/element14 website http://www.newark.com/brazil-direct-ship
Quote
2- Taxes which focuses and how to calculate?
Import Tax: 60% of the Customs Valuation (Customs Value = the value of goods sum + shipping)
ICMS: on average 18%, varying according to the State
« Last Edit: May 25, 2016, 07:47:05 pm by wraper »
 

Online hendorog

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #243 on: May 25, 2016, 08:12:10 pm »
Wow, those taxes are really bad!!

We have 15% + ~$60 for most items I have imported, and I think that is too much.
Can't do much about exchange rate unfortunately. Our exchange rate was quite favourable against USD too, but now it is not good.



 

Offline Fungus

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #244 on: May 25, 2016, 10:21:40 pm »
There is a big difference between screwed up design and faulty particular unit. Also, don't forget about that it is Brazil, prices will be 2x+ of the US.
Quote
detected their screwup and charged $2k to fix it...
After warranty has already expired.

Warranty aside, this really looks like some sort of serious design defect. Keysight could be in big trouble if more people read this thread and say, "That happened to me, too!".
 

Online wraper

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #245 on: May 25, 2016, 10:50:43 pm »
There is a big difference between screwed up design and faulty particular unit. Also, don't forget about that it is Brazil, prices will be 2x+ of the US.
Quote
detected their screwup and charged $2k to fix it...
After warranty has already expired.

Warranty aside, this really looks like some sort of serious design defect. Keysight could be in big trouble if more people read this thread and say, "That happened to me, too!".
Seriously? PLL fault was not a design defect. All it was unlucky to receive such a scope and not test it in reasonable time period. And WTF Keysight out of warranty discussion is doing in the Rigol tread.
« Last Edit: May 25, 2016, 10:52:26 pm by wraper »
 

Offline Fungus

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #246 on: May 25, 2016, 11:04:47 pm »
Warranty aside, this really looks like some sort of serious design defect. Keysight could be in big trouble if more people read this thread and say, "That happened to me, too!".
Seriously? PLL fault was not a design defect. All it was unlucky to receive such a scope and not test it in reasonable time period. And WTF Keysight out of warranty discussion is doing in the Rigol tread.
The 'scope was tested, placed in storage for a while, then refused to boot.

If the firmware is somehow being corrupted (for whatever reason, including "putting it in storage for three months") then that's a design defect.

Keysight has already admitted they've changed the firmware in more recent models so it's easier to re-flash it if it fails. That sounds to me like they've seen a problem.
 

Online wraper

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #247 on: May 25, 2016, 11:12:48 pm »
Warranty aside, this really looks like some sort of serious design defect. Keysight could be in big trouble if more people read this thread and say, "That happened to me, too!".
Seriously? PLL fault was not a design defect. All it was unlucky to receive such a scope and not test it in reasonable time period. And WTF Keysight out of warranty discussion is doing in the Rigol tread.
The 'scope was tested, placed in storage for a while, then refused to boot.

If the firmware is somehow being corrupted (for whatever reason, including "putting it in storage for three months") then that's a design defect.

Keysight has already admitted they've changed the firmware in more recent models so it's easier to re-flash it if it fails. That sounds to me like they've seen a problem.
Maybe you should read it one more time? His scope with no boot issue was replaced IIRC after about 2.5 years. He briefly tested the replacement and put it into storage. Then when 3 year warranty already passed, he started to use the scope, after 2 hour heat up he got PLL error. Now his scope fails after about 40 minutes. Nothing to do with no boot issue which BTW is honored with free repair even after warranty has ended.
 

Offline Fungus

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #248 on: May 25, 2016, 11:28:34 pm »
Maybe you should read it one more time?

Maybe I should, it's hard to remember which of all the failed Keysights 'we're actually talking about.
 

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #249 on: May 26, 2016, 02:38:37 am »
Maybe you should read it one more time?

Maybe I should, it's hard to remember which of all the failed Keysights 'we're actually talking about.
:palm: Your will to bash everyone except holy Rigol is just amazing. I'm talking about The Keysight form Brazil (link you posted in this tread). Get your facts right, before blaming some manufacturer for commited crimes.
« Last Edit: May 26, 2016, 02:40:56 am by wraper »
 

Offline Fungus

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #250 on: May 26, 2016, 02:40:31 am »
I'm talking about The Keysight form Brazil (link you posted in this tread).

I'm just amazed you're defending Keysight here. If it was Rigol doing this you'd be going in with both guns blazing.

 

Online wraper

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #251 on: May 26, 2016, 02:45:42 am »
I'm talking about The Keysight form Brazil (link you posted in this tread).

I'm just amazed you're defending Keysight here. If it was Rigol doing this you'd be going in with both guns blazing.
I'm amazed I need to defend Keysight in Rigol tread because someone writes off topic BS in multiple treads.
I personally found some Keysight manufacturing fault in U1272A meter and created a tread in the past. And few people found the same issue in their meters (all got exchanged even without returning first).
 

Offline pascal_sweden

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #252 on: July 30, 2016, 08:12:00 pm »
Is there any overall write up or summary about the Yaigol project?

I am looking for something in the following structure:

1) Initial problem detected that seem to indicate a design issue
2) Investigation about the design issue
3) Confirmation about the actual design issue
4) Current impact of the design issue
5) Current firmware workaround for the design issue
6) Actual hardware fix for the design issue
7) Improved results after the design issue has been fixed in hardware
8) Scopes that are affected: Rigol DS1054Z, Rigol DS2072A?
 

Offline outremer

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #253 on: July 31, 2016, 01:28:40 pm »
 :clap:  Hi all !

I spent hours reading this thread, redirected by tautech. I was impressed by the work of Bud. I'am planning to purchase a DS2202A. After analysing  the various contributions I came to the conclusion that the scope should just work according to its specs no matter if the spectral purity of its PLL output is perfect or not. If a firmware upgrade fixes the issue I will not look further. Poeple driving a Volkswagen diesel car have been more abused although the victim is the environment. This story is also good example to show how software gets more and more the determining factor in correcting design errors. See how the faulty  mirror of telescope Hubble was "repaired" (shoud I say repolished ?) with a bunch of code lines).

Regards, Phil FM5GB.
 

Offline German_EE

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #254 on: July 31, 2016, 06:11:08 pm »
The Hubble Telescope was repaired using a module called COSTAR which is about the size of a baby grand piano. Applying this fix required design, construction, delivery by Space Shuttle and two astronauts carrying out an eight hour spacewalk.

A bit more than "a bunch of code lines"
Should you find yourself in a chronically leaking boat, energy devoted to changing vessels is likely to be more productive than energy devoted to patching leaks.

Warren Buffett
 
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Offline Emi

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Re: Project Yaigol: Fixing Rigol scope design problems.
« Reply #255 on: August 01, 2016, 11:22:18 pm »
Hi  :D
After reading all these posts i still dont know how should  i test My ds2072 in order To confirm its "goodness " or not.
I put in a 1k Sine and its perfect and stable..so with 1mhz, 10, 100 and over 450 mhz...
Ive seen a complex  433 mhz Fm/pcm modulated signal from a radio remote control with stock probes too..perfecltly displayed. .i rally cant be disappointed with this stuff. .