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Proof: MOSFET datasheets lie to you!

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T3sl4co1l:
I've been wondering for YEARS now if this is actually a thing or what.

Turns out it is, and I finally have the keywords to search on it!  And it does have consequences in-circuit!  Not just a measurement discrepancy.

The smoking gun: I measured this awkwardly drawn plot back in 2013,



A later revisit (2017) produced these data,



STP19NM50N was a SuperJunction type (ST's MDmesh II) power N-MOSFET.  Like most SJ types (pretty much anything >= 200V since mid-2000s to 2010s), it shows a suspiciously abrupt drop in Coss at low voltages (typically at 10-50V for a 600V-class part).  But I was never able to reproduce that curve.  All my measurements (based on dV/dt) showed the fatter curve.

So what's the deal?  They're lying, right?

This reveals what I was missing:
https://www.slideshare.net/MichaelHarrison96/coss-hysteresis-in-advanced-superjunction-mosfets-apec-2016-presentation-compressed
particularly page 7 fits everything absolutely perfectly.

If I understand this correctly, it's effectively a recovery effect; not recombination mediated, as the minority carriers in a diode/BJT, but a majority carrier effect, migrating through the region as it depletes.  Effectively the junction capacitance has dielectric loss, or high ESR, but only transiently as it's discharging from the very-high-C state (where the depletion region zig-zags up and down the SJ pillars) to the low-C state (fully depleted, high-Q silicon insulating between D/S).

https://superlab.stanford.edu/files2download/TED2018_paper_Grayson.pdf
This explains it as an RC equivalent circuit, noting that the pillars effectively charge in series so making an RC (lossy) transmission line like structure.  And the C's are voltage-dependent, of course.  More measurements are also provided, showing the frequency dependency.

...Gosh, I wonder if this applies to those "schottky" diodes, the kind in higher voltage ratings that have a t_rr spec (that is definitely there (I've measured that too), and is independent of temperature).  I bet it does.  I'm not sure what all technologies are applied in those things, but they must be using SJ in at least a few families.  The same effect will look exactly like recovery loss; though, the charge should be dependent only on ΔV and dV/dt, not If.  But it does depend on If; mhh, perhaps some conductivity modulation and recombination taking place then?  Oh, maybe my measurement jig produces correlated dV/dt and If, that could be too.  Ooh, I wonder what dynamic breakdown looks like on those; can they avalanche lower during t_rr (as regular PN diodes can)?  Something else to try...

Tim

Terry Bites:
All datasheets have at least one dodgy statement or sneaky chart. 

BillyO:
Data sheets are full of lies, old wives tales and historic quotes to please ancient engineers.  Think of them as toilet paper for CYA purposes.

Like pretty much every CMOS device before about 10 years ago (and most after) quoting only TTL environment data.  Seriously, who is feeding old 1970's TTL devices from 21st century high speed CMOS memory?  Keep yanking, I may cum around...

Or how about the specification for testing power supplies.  Scope limited to 20MHz BW?  Gim'me a freakin' break!  How is that pertinent to today's GHz world?  "Oh well sonny, that's the way it was first done in 1966!"

Yeah, take most specification and data sheets with a grain (or two) of salt and a bottle of Scotch.

exe:
I was about to start a topic like that. I'm in the market of small signal fets, and I'm looking for those devices with lowest gate capacitance so I can easily drive them by an opamp. The thing is, according to my transistor tester, gate capacitance often doesn't match typical value. Like FDV301N measured 200pf instead of 50pf "typical". The DS provides only typical value. I had same thing with other devices. Like, one device measured 80pf instead of 25 or 30.

Idk how much I can trust transistor tester on that, but it seems for some devices it does display what's close to typical value.

moffy:
It is a little suspicious that they don't show a test circuit for measuring the COSS, but I would assume that they did it with zero gate bias, since that is not a variable. But then I wouldn't expect COSS to vary with current either, tricky. Thanks for the info.

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